Wireless communication device supporting communication schemes and operating method thereof

    公开(公告)号:US10285143B2

    公开(公告)日:2019-05-07

    申请号:US15041779

    申请日:2016-02-11

    Inventor: Jaehyeon Park

    Abstract: Methods and devices are provided, where the device includes a plurality of wireless communication units. The wireless communication device also includes a first interface unit configured to synchronize a data signal received from one of the plurality of wireless communication units with a first clock corresponding to the one of the plurality of wireless communication units, and configured to output the synchronized data signal to a second interface unit. The second interface unit is configured to receive the synchronized data signal using a second clock having a shorter period than the first clock, count a number of periods of the second clock during at least one period of the first clock, and determine an output port for the synchronized data signal based on a result of the counting. The wireless communication device further includes a plurality of processors for processing data signals.

    Apparatus and method for enhancing launch speed of large-memory consuming app

    公开(公告)号:US12265709B2

    公开(公告)日:2025-04-01

    申请号:US17982106

    申请日:2022-11-07

    Abstract: Provided is an apparatus and method for improving the entry speed of a large-memory consuming application in an electric device which detect an execution of an application, check if the application is a large-memory consuming application which uses a large amount of memory, and if the application is the large-memory consuming application, execute pre-process thread reclaim, select a process corresponding to a reclaiming target among processes currently resident in the memory, reclaim part of the memory being used by the selected process without terminating the selected process, and thereby improve the entry speed of a large-memory consuming application.

    Memory management method and electronic device

    公开(公告)号:US12086420B2

    公开(公告)日:2024-09-10

    申请号:US18106131

    申请日:2023-02-06

    CPC classification number: G06F3/0616 G06F3/0653 G06F3/0659 G06F3/0673

    Abstract: An electronic device comprises: a memory management module; a processor operatively connected to the memory management module; and a memory controlled by the memory management module and operatively connected to the processor. The memory is configured to store instructions which, when executed, cause the processor to: execute at least one process, identify a rate at which the at least one process is terminated, based on a preconfigured first cycle, determine a number of times the identified rate exceeds a first threshold value, and based on a determination that the number of times the identified rate exceeds the first threshold value is greater than a second threshold value, reboot the electronic device.

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