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公开(公告)号:US11974433B2
公开(公告)日:2024-04-30
申请号:US17575947
申请日:2022-01-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joo-Heon Kang , Tae Hun Kim , Jae Ryong Sim , Kwang Young Jung , Gi Yong Chung , Jee Hoon Han , Doo Hee Hwang
Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
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公开(公告)号:US20220037316A1
公开(公告)日:2022-02-03
申请号:US17334589
申请日:2021-05-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SEUNG YOON KIM , Jae Ryong Sim , Jee Hoon Han
IPC: H01L27/088 , H01L29/417 , H01L21/8234
Abstract: A semiconductor device includes an active region that extends in a first direction and has a first width in a second direction that intersects the first direction, a first gate structure disposed on the active region that has a second width in the first direction and extends in the second direction, a first metal contact spaced apart from the first gate structure in the first direction, a first trench formed in the active region, and an insulating material that fills the first trench and forms a first active cut, wherein the first active cut defines a first metal region in the active region in which the first metal contact is located, and the first metal contact is placed off-center inside the first metal region and a length of a region where the first gate structure and the active region overlap is greater than that of the first and second trenches.
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公开(公告)号:US11227870B2
公开(公告)日:2022-01-18
申请号:US16739392
申请日:2020-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joo-Heon Kang , Tae Hun Kim , Jae Ryong Sim , Kwang Young Jung , Gi Yong Chung , Jee Hoon Han , Doo Hee Hwang
IPC: H01L27/11578 , H01L27/11582 , H01L27/1157
Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
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