公开(公告)号：US20130128671A1

公开(公告)日：2013-05-23

申请号：US13625114

申请日：2012-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-HWAN SHIN ,  KITAE PARK ,  HYUN-WOOK PARK ,  JUN-HEE LEE

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C11/5621 ,  G11C16/06

Abstract: Disclosed is a flash memory device and programming method that includes; receiving buffer data and determining between a high-speed mode and a reliability mode for buffer data, and upon determining the reliability mode storing the buffer data in a first buffer region, and upon determining the high-speed mode storing the buffer data in a second buffer region. The memory cell array of the flash memory including a main region and a separately designated buffer region divided into the first buffer region and second buffer region.

Abstract translation: 公开了一种闪速存储器件和编程方法，包括： 接收缓冲器数据，并在缓冲器数据的高速模式和可靠性模式之间确定，并且在确定将缓冲器数据存储在第一缓冲区域中的可靠性模式时，并且在确定将第二缓冲器数据存储在第二缓冲器数据中的高速模式 缓冲区。 闪速存储器的存储单元阵列包括分为第一缓冲区域和第二缓冲区域的主区域和单独指定的缓冲区域。