公开(公告)号：US20220406914A1

公开(公告)日：2022-12-22

申请号：US17691680

申请日：2022-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAEHYUN LEE ,  JONGHAN LEE ,  HYUNGKOO KANG ,  JONGHOON BAEK

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L27/088 ,  H01L29/417 ,  H01L29/49

Abstract: A semiconductor device includes an active fin protruding from a substrate; a plurality of channel layers on the active fin and spaced apart from each other in a vertical direction; a gate pattern intersecting the active fin and the plurality of channel layers; and source/drain regions on recessed regions of the active fin on both sides of the gate pattern. The gate pattern includes a gate dielectric layer, inner conductive layers, and a conductive liner. The inner conductive layers are disposed between the plurality of channel layers, and between the active fin and a lowermost channel layer among the plurality of channel layers. The conductive liner has a first thickness on an upper surface of an uppermost channel layer in the vertical direction, and at least one of the inner conductive layers have a second thickness in the vertical direction. The first thickness is less than the second thickness.