公开(公告)号：US20240175915A1

公开(公告)日：2024-05-30

申请号：US18203138

申请日：2023-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEKYE JEON ,  JINWOO LEE ,  JONGCHEON SUN ,  SUYOUNG LEE ,  HYEONGCHEOL LEE ,  CHUNGSAM JUN

IPC: G01R31/28

CPC classification number: G01R31/2853 ,  G01R31/287

Abstract: In a substrate inspection method, a substrate is provided on a substrate stage, the substrate having internal wires and connection wires, the internal wires respectively provided between stacked insulating layers, the connection wires respectively extending from the internal wires and exposed to an upper surface of the substrate. An electric circuit of the internal wires in the substrate is modeled to generate a circuit model. AC power is applied to the substrate stage to obtain measured capacitance values of the internal wires through currents that are obtained from the connection wires. DC power is applied to the substrate stage to obtain measured resistance values of the internal wires through voltages that are obtained from the connection wires. Impedance values of the internal wires are calculated through the measured capacitance values and the measured resistance values. The impedance values and the circuit model are compared to determine reliability of the substrate.