公开(公告)号：US20240304599A1

公开(公告)日：2024-09-12

申请号：US18469946

申请日：2023-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gunho Chang

IPC: H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L29/06

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3157 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A semiconductor package includes a first semiconductor chip including a first surface and an opposite second surface, second semiconductor chips vertically stacked on the first semiconductor chip, each of the second semiconductor chips including a third surface and an opposite fourth surface, and a molding layer on the first surface of the first semiconductor chip and at least partially surrounding the second semiconductor chips. The first surface of the first semiconductor chip is in direct contact with the fourth surface of a lowermost second semiconductor chip of the second semiconductor chips. The third surface of the lowermost second semiconductor chip of the second semiconductor chips is in direct contact with the fourth surface of an adjacent one of the second semiconductor chips. A width of each of the second semiconductor chips decreases in a direction from the third surface toward the fourth surface thereof.

公开(公告)号：US11848274B2

公开(公告)日：2023-12-19

申请号：US17811362

申请日：2022-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geol Nam ,  Gunho Chang

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L23/5384 ,  H01L23/373 ,  H01L23/5386 ,  H01L24/14 ,  H01L25/0657

Abstract: A semiconductor package includes: a base chip; a first semiconductor chip disposed on the base chip; a second semiconductor chip disposed on the first semiconductor chip; a first insulating layer disposed between the base chip and the first semiconductor chip; a second insulating layer disposed between the first semiconductor chip and the second semiconductor chip; a first connection bump penetrating through the first insulating layer and connecting the base chip and the first semiconductor chip to each other; and a second connection bump penetrating through the second insulating layer and connecting the first semiconductor chip and the second semiconductor chip to each other. The base chip has a width greater than a width of each of the first and second semiconductor chips. The first insulating layer and the second insulating layer include different materials from each other.

公开(公告)号：US20220344271A1

公开(公告)日：2022-10-27

申请号：US17811362

申请日：2022-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geol Nam ,  Gunho Chang

IPC: H01L23/538 ,  H01L23/373 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes: a base chip; a first semiconductor chip disposed on the base chip; a second semiconductor chip disposed on the first semiconductor chip; a first insulating layer disposed between the base chip and the first semiconductor chip; a second insulating layer disposed between the first semiconductor chip and the second semiconductor chip; a first connection bump penetrating through the first insulating layer and connecting the base chip and the first semiconductor chip to each other; and a second connection bump penetrating through the second insulating layer and connecting the first semiconductor chip and the second semiconductor chip to each other. The base chip has a width greater than a width of each of the first and second semiconductor chips. The first insulating layer and the second insulating layer include different materials from each other.