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公开(公告)号:US10782974B2
公开(公告)日:2020-09-22
申请号:US15360271
申请日:2016-11-23
发明人: Young-chul Cho , Suk-jin Kim , Chul-soo Park , Dong-kwan Suh
摘要: A VLIW (Very Long Instruction Word) interface device includes a memory configured to store instructions and data, and a processor configured to process the instructions and the data, wherein the processor includes an instruction fetcher configured to output an instruction fetch request to load the instruction from the memory, a decoder configured to decode the instruction loaded on the instruction fetcher, an arithmetic logic unit (ALU) configured to perform an operation function if the decoded instruction is an operation instruction, a memory interface scheduler configured to schedule the instruction fetch request or a data fetch request that is input from the arithmetic logic unit, and a memory operator configured to perform a memory access operation in accordance with the scheduled instruction fetch request or data fetch request.
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公开(公告)号:US10430339B2
公开(公告)日:2019-10-01
申请号:US15107255
申请日:2014-12-30
发明人: Ki-seok Kwon , Chul-soo Park , Suk-jin Kim
IPC分类号: G06F12/0846 , G06F12/0815 , G06F12/0886 , G06F12/02
摘要: A memory management method includes determining a stride value for stride access by referring to a size of two-dimensional (2D) data, and allocating neighboring data in a vertical direction of the 2D data to a plurality of banks that are different from one another according to the determined stride value. Thus, the data in the vertical direction may be efficiently accessed by using a memory having a large data width.
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