公开(公告)号：US20230127871A1

公开(公告)日：2023-04-27

申请号：US17877251

申请日：2022-07-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHOONGSUN KIM ,  SHIGENOBU MAEDA ,  MYOUNGKYU PARK

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/8238

Abstract: A method of manufacturing a semiconductor device includes forming an active fin protruding from a substrate and extending in a first direction; forming sacrificial gate patterns intersecting the active fin and extend in a second direction; forming recess regions by etching the active fin on at least one side of each of the sacrificial gate patterns; forming source/drain regions on the recess regions; removing the sacrificial gate patterns to form openings; and forming a gate dielectric layer and a gate electrode such that gate structures are formed to cover the active fin in the openings. The source/drain regions are formed by an epitaxial growth process and an in-situ doping process of doping first conductivity-type impurity elements. In at least one of the source/drain regions, after the in-situ doping process is performed, counter-doping is performed using second conductivity-type impurity elements different from the first conductivity-type impurity elements to decrease carrier concentration.