公开(公告)号：US20190214989A1

公开(公告)日：2019-07-11

申请号：US16107424

申请日：2018-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoo Seok SHON ,  Sang Woo KIM ,  Byung Tak LEE ,  Yun Ju KWON ,  Joon-Woo CHO

IPC: H03K19/00 ,  G06F1/06 ,  G06F1/32

Abstract: Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a hardware auto clock gating (HWACG) logic configured to provide clock gating of an intellectual property (IP) block; and a memory power controller configured to perform power gating of a memory electrically connected with the IP block, based on the HWACG logic providing the clock gating for the IP block. The HWACG logic includes a first clock source configured to provide a first clock signal; a second clock source configured to receive the first clock signal provided by the first clock source, and provide a second clock signal to the IP block; a first clock control circuit configured to control the first clock source; and a second clock control circuit configured to transmit a clock request to the first clock control circuit, and control the second clock source, based on an operation state of the IP block.