公开(公告)号：US10515592B2

公开(公告)日：2019-12-24

申请号：US16043739

申请日：2018-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yanguk Nam ,  Dae-sik Lee ,  Yoomi Kim ,  Junghwan Hwang

IPC: G09G3/3258 ,  G09G3/3233 ,  H01L27/32 ,  G09G3/36

Abstract: A display device includes: a display panel including data lines, gate lines, and pixels, the display panel is operated in an active period or in a blank period; and a driving circuit for driving the display panel, the driving circuit including: a signal controller for outputting clock control signals; a voltage generator for receiving the clock control signals, wherein the voltage generator outputs active clock signals synchronized with the clock control signals during the active period and outputs blank clock signals during the blank period; and an overcurrent detection circuit for receiving the clock control signals and the blank clock signals, the overcurrent detection circuit detects an overcurrent of the blank clock signals, and a phase difference between the clock control signals in the active period is different from a phase difference between the clock control signals in the blank period.

公开(公告)号：US20190251888A1

公开(公告)日：2019-08-15

申请号：US16248112

申请日：2019-01-15

Applicant: SAMSUNG DISPLAY CO.,LTD.

Inventor： DAE-SIK LEE ,  Yanguk Nam ,  Yoomi Kim

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G02F1/136286 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/08 ,  H01L27/3276

Abstract: A gate driving device of a display device may include a voltage generator, a gate controller and a gate driver. The voltage generator may generate a gate driving voltage that varies between a gate-on voltage and a gate-off voltage. The gate controller may generate gate clock signals based on the gate driving voltage and gate control signals. The gate driver may generate a gate signal based on the gate clock signals. The gate control signals may include a first control signal and clock control signals, each varying between a high level and a low level. The gate controller may output the gate clock signals having a voltage level of the gate-off voltage when the first control signal and the clock control signals are each provided to the gate controller at the low level, thereby avoiding a display defect due to voltage ramping that may otherwise occur.

公开(公告)号：US11087691B2

公开(公告)日：2021-08-10

申请号：US16720370

申请日：2019-12-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yanguk Nam ,  Dae-sik Lee ,  Yoomi Kim ,  Junghwan Hwang

IPC: G09G3/3258 ,  G09G3/3233 ,  H01L27/32 ,  G09G3/36

Abstract: A display device includes: a display panel including data lines, gate lines, and pixels, the display panel is operated in an active period or in a blank period; and a driving circuit for driving the display panel, the driving circuit including: a signal controller for outputting clock control signals; a voltage generator for receiving the clock control signals, wherein the voltage generator outputs active clock signals synchronized with the clock control signals during the active period and outputs blank clock signals during the blank period; and an overcurrent detection circuit for receiving the clock control signals and the blank clock signals, the overcurrent detection circuit detects an overcurrent of the blank clock signals, and a phase difference between the clock control signals in the active period is different from a phase difference between the clock control signals in the blank period.

公开(公告)号：US10916167B2

公开(公告)日：2021-02-09

申请号：US16248112

申请日：2019-01-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dae-Sik Lee ,  Yanguk Nam ,  Yoomi Kim

IPC: G09G3/20 ,  G09G3/36 ,  G02F1/1362 ,  H01L27/32 ,  G09G3/3266

Abstract: A gate driving device of a display device may include a voltage generator, a gate controller and a gate driver. The voltage generator may generate a gate driving voltage that varies between a gate-on voltage and a gate-off voltage. The gate controller may generate gate clock signals based on the gate driving voltage and gate control signals. The gate driver may generate a gate signal based on the gate clock signals. The gate control signals may include a first control signal and clock control signals, each varying between a high level and a low level. The gate controller may output the gate clock signals having a voltage level of the gate-off voltage when the first control signal and the clock control signals are each provided to the gate controller at the low level, thereby avoiding a display defect due to voltage ramping that may otherwise occur.

公开(公告)号：US10607562B2

公开(公告)日：2020-03-31

申请号：US15904722

申请日：2018-02-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jongjae Lee ,  Dae-sik Lee ,  Yanguk Nam ,  Yoomi Kim ,  Songyi Han

IPC: G09G3/36 ,  H03K5/1252 ,  H03K5/24 ,  G09G3/20 ,  H03K21/08

Abstract: A voltage generation circuit of a display device includes an over-current detection circuit that provides a driving voltage to a voltage terminal and outputs an over-current detection signal. The over-current detection circuit includes a current detector that outputs a detection signal at a first level when a voltage corresponding to an output current flowing through the voltage terminal during a blank period, in which a blank signal is activated, is lower than a first reference level or higher than a second reference level, a glitch remover that outputs a noise detection signal when a time period in which the detection signal is maintained at the first level is longer than a reference maintenance time, and a noise filter that activates the over-current detection signal when the noise detection signal is activated at least twice during a predetermined time period.

公开(公告)号：US20190122611A1

公开(公告)日：2019-04-25

申请号：US16043739

申请日：2018-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YANGUK NAM ,  Dae-sik Lee ,  Yoomi Kim ,  Junghwan Hwang

IPC: G09G3/3258 ,  G09G3/3233 ,  H01L27/32

CPC classification number: G09G3/3258 ,  G09G3/3233 ,  G09G3/3696 ,  G09G2310/0264 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2330/025 ,  G09G2330/028 ,  G09G2330/04 ,  G09G2330/045 ,  H01L27/3276

Abstract: A display device includes: a display panel including data lines, gate lines, and pixels, the display panel is operated in an active period or in a blank period; and a driving circuit for driving the display panel, the driving circuit including: a signal controller for outputting clock control signals; a voltage generator for receiving the clock control signals, wherein the voltage generator outputs active clock signals synchronized with the clock control signals during the active period and outputs blank clock signals during the blank period; and an overcurrent detection circuit for receiving the clock control signals and the blank clock signals, the overcurrent detection circuit detects an overcurrent of the blank clock signals, and a phase difference between the clock control signals in the active period is different from a phase difference between the clock control signals in the blank period.