Abstract:
A liquid crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixels arranged in rows and columns, a first sub gate-line coupled to first row-pixels that are adjacent to a lower side of the first sub gate-line, a second sub gate-line coupled to second row-pixels that are adjacent to an upper side of the second sub gate-line, a plurality of gate-lines between the first sub gate-line and the second sub gate-line, a plurality of even data-lines coupled to first column-pixels that are adjacent to the even data-lines, and a plurality of odd data-lines coupled to second column-pixels that are adjacent to the odd data-lines. Here, each gate-line of the plurality of gate lines is coupled to first row-pixels that are adjacent to a lower side of the gate-line and second row-pixels that are adjacent to an upper side of the gate-line.
Abstract:
A liquid crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixels arranged in rows and columns, a first sub gate-line coupled to first row-pixels that are adjacent to a lower side of the first sub gate-line, a second sub gate-line coupled to second row-pixels that are adjacent to an upper side of the second sub gate-line, a plurality of gate-lines between the first sub gate-line and the second sub gate-line, a plurality of even data-lines coupled to first column-pixels that are adjacent to the even data-lines, and a plurality of odd data-lines coupled to second column-pixels that are adjacent to the odd data-lines. Here, each gate-line of the plurality of gate lines is coupled to first row-pixels that are adjacent to a lower side of the gate-line and second row-pixels that are adjacent to an upper side of the gate-line.