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公开(公告)号:US20120217129A1
公开(公告)日:2012-08-30
申请号:US13339426
申请日:2011-12-29
Applicant: Ryosuke TSUTSUMI , Hiroaki MURAKAMI , Yoshihisa NAGANO
Inventor: Ryosuke TSUTSUMI , Hiroaki MURAKAMI , Yoshihisa NAGANO
IPC: B23Q7/08
CPC classification number: B25J9/0093 , B23P21/004 , B25J9/0096 , Y10S901/16
Abstract: A work system according to embodiments includes a robot and work stations. The robot performs a predetermined work on a workpiece as a work target. The work stations are places where the predetermined work is performed on the workpiece. The robot performs conveying of the workpiece between the work stations.
Abstract translation: 根据实施方式的工作系统包括机器人和工作站。 机器人作为工作目标在工件上执行预定的工作。 工作站是在工件上执行预定工作的地方。 机器人在工作站之间执行工件的传送。
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公开(公告)号:US20070287249A1
公开(公告)日:2007-12-13
申请号:US11758376
申请日:2007-06-05
Applicant: Hiroshi YOSHIDA , Toyoji ITO , Yoshihisa NAGANO
Inventor: Hiroshi YOSHIDA , Toyoji ITO , Yoshihisa NAGANO
IPC: H01L21/8242
CPC classification number: H01L27/11507 , H01L27/11502 , H01L28/55 , H01L28/65
Abstract: A method includes the steps of: forming a first insulation film on a substrate; forming a hole in the first insulation film; forming a lower electrode on a bottom surface and a sidewall surface of the hole; forming a capacitor insulation film on the lower electrode; forming a second conductive layer on the capacitor insulation film; forming a second insulation film on the second conductive layer so that the second insulation film fills a recess corresponding to the hole; forming a resist mask on the second insulation film so that the resist mask covers the recess; patterning the second insulation film by using the resist mask; and patterning the second conductive layer and the capacitor insulation film by using the patterned second insulation film as a hard mask. By dry etching using a hard mask, a dielectric capacitor having a three-dimensionally stacked structure can be formed with a high yield.
Abstract translation: 一种方法包括以下步骤:在衬底上形成第一绝缘膜; 在第一绝缘膜上形成孔; 在所述孔的底表面和侧壁表面上形成下电极; 在下电极上形成电容绝缘膜; 在电容绝缘膜上形成第二导电层; 在所述第二导电层上形成第二绝缘膜,使得所述第二绝缘膜填充与所述孔对应的凹部; 在所述第二绝缘膜上形成抗蚀剂掩模,使得所述抗蚀剂掩模覆盖所述凹部; 通过使用抗蚀剂掩模来图案化第二绝缘膜; 以及通过使用图案化的第二绝缘膜作为硬掩模来图案化第二导电层和电容器绝缘膜。 通过使用硬掩模的干蚀刻,可以以高产率形成具有三维层叠结构的介电电容器。
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