LINEAR SAMPLER
    1.
    发明申请
    LINEAR SAMPLER 有权
    线性采样器

    公开(公告)号:US20150303962A1

    公开(公告)日:2015-10-22

    申请号:US14256214

    申请日:2014-04-18

    CPC classification number: H04B1/28 H03D7/165 H04B1/16

    Abstract: A frequency conversion circuit having a plurality of N signal channels, each being fed an input signal and a train of pluses having a period T and a duty cycle T/N. Each signal channel includes: a column III-V semiconductor sampler coupled the input signal and being responsive to sampling signals; and a column IV semiconductor controllable time delay for producing the train of sampling signals in response to a train of pulses produced on the column IV semiconductor, the time delay imparting a time delay to the pulses in accordance with a time delay command signal fed to the time delay. Each one of the sampling signals is produced by the time delay in each one of the channels with the period T and the duty cycle T/N with the sampling signals in one of the trains of the sampling signals being delayed with respect to the sampling signals in another one of the trains the sampling signals a time T/N.

    Abstract translation: 一种具有多个N个信号通道的频率转换电路,每个信号通道馈送有输入信号和一个具有周期T和占空比T / N的脉冲串。 每个信号通道包括:耦合输入信号并对采样信号作出响应的列III-V半导体采样器; 以及列IV半导体可控时间延迟,用于响应于在列IV半导体上产生的脉冲序列产生采样信号序列,所述延时根据馈送到所述第一IV半导体的时间延迟命令信号向脉冲施加时间延迟 时间延迟 采样信号中的每一个由具有周期T和占空比T / N的每个信道中的时间延迟产生,采样信号的列中的一个采样信号相对于采样信号被延迟 在另一列火车中,采样信号为时间T / N。

    Beam forming system having linear samplers
    2.
    发明授权
    Beam forming system having linear samplers 有权
    具有线性采样器的光束成像系统

    公开(公告)号:US09577328B2

    公开(公告)日:2017-02-21

    申请号:US14256216

    申请日:2014-04-18

    CPC classification number: H01Q3/2682 H03D7/00 H03D7/165 H03D2200/006

    Abstract: A frequency conversion circuit having a plurality of N signal channels, each being fed an input signal and a train of pluses having a period T and a duty cycle T/N. Each channel includes: a sampler coupled the input signal and being responsive to sampling signals; and a controllable time delay for producing the train of sampling signals in response to the train of pulses, the time delay imparting a time delay to the pulses in accordance with a time delay command signal fed to the time delay. Each one of the sampling signals is produced by the time delay in each one of the channels with the period T and the duty cycle T/N with the sampling signals in one of the trains of the sampling signals being delayed with respect to the sampling signals in another one of the trains the sampling signals a time T/N.

    Abstract translation: 一种具有多个N个信号通道的频率转换电路,每个信号通道馈送有输入信号和一个具有周期T和占空比T / N的脉冲串。 每个通道包括:采样器耦合输入信号并响应采样信号; 以及响应于脉冲序列产生采样信号序列的可控时间延迟,所述时间延迟根据馈送到时间延迟的时间延迟命令信号向脉冲施加时间延迟。 采样信号中的每一个由具有周期T和占空比T / N的每个信道中的时间延迟产生,采样信号的列中的一个采样信号相对于采样信号被延迟 在另一列火车中,采样信号为时间T / N。

    Linear sampler
    3.
    发明授权
    Linear sampler 有权
    线性采样器

    公开(公告)号:US09154173B1

    公开(公告)日:2015-10-06

    申请号:US14256214

    申请日:2014-04-18

    CPC classification number: H04B1/28 H03D7/165 H04B1/16

    Abstract: A frequency conversion circuit having a plurality of N signal channels, each being fed an input signal and a train of pluses having a period T and a duty cycle T/N. Each signal channel includes: a column III-V semiconductor sampler coupled the input signal and being responsive to sampling signals; and a column IV semiconductor controllable time delay for producing the train of sampling signals in response to a train of pulses produced on the column IV semiconductor, the time delay imparting a time delay to the pulses in accordance with a time delay command signal fed to the time delay. Each one of the sampling signals is produced by the time delay in each one of the channels with the period T and the duty cycle T/N with the sampling signals in one of the trains of the sampling signals being delayed with respect to the sampling signals in another one of the trains the sampling signals a time T/N.

    Abstract translation: 一种具有多个N个信号通道的频率转换电路,每个信号通道馈送有输入信号和一个具有周期T和占空比T / N的脉冲串。 每个信号通道包括:耦合输入信号并对采样信号作出响应的列III-V半导体采样器; 以及列IV半导体可控时间延迟,用于响应于在列IV半导体上产生的脉冲序列产生采样信号序列,所述延时根据馈送到所述第一IV半导体的时间延迟命令信号向脉冲施加时间延迟 时间延迟 采样信号中的每一个由具有周期T和占空比T / N的每个信道中的时间延迟产生,采样信号的列中的一个采样信号相对于采样信号被延迟 在另一列火车中,采样信号为时间T / N。

    DIFFERENTIAL-TO-SINGLE-ENDED TRANSMISSION LINE INTERFACE
    4.
    发明申请
    DIFFERENTIAL-TO-SINGLE-ENDED TRANSMISSION LINE INTERFACE 有权
    差分到单端传输线接口

    公开(公告)号:US20150022279A1

    公开(公告)日:2015-01-22

    申请号:US13947328

    申请日:2013-07-22

    CPC classification number: H01P3/026 G06F13/4068 H01P5/028

    Abstract: An interface for connecting a differential signal circuit having a differential signal output and a reference potential terminal to an input of a single ended signal circuit and a reference potential terminal. The interface includes a differential transmission line having a pair of electromagnetically coupled microwave transmission lines having first ends connected to the differential signal output and second ends, one of the second ends being connected to the single ended circuit input and the other one of the second ends being coupled to the reference potential terminals of the differential signal circuit and the single ended signal circuit.

    Abstract translation: 用于将具有差分信号输出的差分信号电路和参考电位端子连接到单端信号电路和参考电位端子的输入的接口。 该接口包括差分传输线,其具有一对电磁耦合微波传输线,其一端连接到差分信号输出端和第二端,第二端中的一端连接到单端电路输入,另一端连接到第二端 耦合到差分信号电路和单端信号电路的参考电位端。

    Differential-to-single-ended transmission line interface
    5.
    发明授权
    Differential-to-single-ended transmission line interface 有权
    差分到单端传输线接口

    公开(公告)号:US09270002B2

    公开(公告)日:2016-02-23

    申请号:US13947328

    申请日:2013-07-22

    CPC classification number: H01P3/026 G06F13/4068 H01P5/028

    Abstract: An interface for connecting a differential signal circuit having a differential signal output and a reference potential terminal to an input of a single ended signal circuit and a reference potential terminal. The interface includes a differential transmission line having a pair of electromagnetically coupled microwave transmission lines having first ends connected to the differential signal output and second ends, one of the second ends being connected to the single ended circuit input and the other one of the second ends being coupled to the reference potential terminals of the differential signal circuit and the single ended signal circuit.

    Abstract translation: 用于将具有差分信号输出的差分信号电路和参考电位端子连接到单端信号电路和参考电位端子的输入的接口。 该接口包括差分传输线,其具有一对电磁耦合微波传输线,其一端连接到差分信号输出端和第二端,第二端中的一端连接到单端电路输入,另一端连接到第二端 耦合到差分信号电路和单端信号电路的参考电位端。

    BEAM FORMING SYSTEM HAVING LINEAR SAMPLERS
    6.
    发明申请
    BEAM FORMING SYSTEM HAVING LINEAR SAMPLERS 有权
    具有线性取样器的束形成系统

    公开(公告)号:US20150303567A1

    公开(公告)日:2015-10-22

    申请号:US14256216

    申请日:2014-04-18

    CPC classification number: H01Q3/2682 H03D7/00 H03D7/165 H03D2200/006

    Abstract: A frequency conversion circuit having a plurality of N signal channels, each being fed an input signal and a train of pluses having a period T and a duty cycle T/N. Each channel includes: a sampler coupled the input signal and being responsive to sampling signals; and a controllable time delay for producing the train of sampling signals in response to the train of pulses, the time delay imparting a time delay to the pulses in accordance with a time delay command signal fed to the time delay. Each one of the sampling signals is produced by the time delay in each one of the channels with the period T and the duty cycle T/N with the sampling signals in one of the to trains of the sampling signals being delayed with respect to the sampling signals in another one of the trains the sampling signals a time T/N.

    Abstract translation: 一种具有多个N个信号通道的频率转换电路,每个信号通道馈送有输入信号和一个具有周期T和占空比T / N的脉冲串。 每个通道包括:采样器耦合输入信号并响应采样信号; 以及响应于脉冲序列产生采样信号序列的可控时间延迟,所述时间延迟根据馈送到时间延迟的时间延迟命令信号向脉冲施加时间延迟。 采样信号中的每一个由具有周期T和占空比T / N的每个通道中的时间延迟产生,采样信号的一列之一中的采样信号相对于采样被延迟 在另一列火车中的信号采样信号为时间T / N。

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