公开(公告)号：US20140239406A1

公开(公告)日：2014-08-28

申请号：US14185801

申请日：2014-02-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Nobuhiro TSUDA ,  Hidekatsu NISHIMAKI ,  Hiroshi OMURA ,  Yuko YOSHIFUKU

IPC: H01L27/092

CPC classification number: H01L27/0928 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/11803 ,  H01L27/11898

Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.

Abstract translation: pMIS区域设置在沿第一方向延伸并且穿过多个标准单元和第一外围边缘中的每一个的边界之间。 nMIS区域设置在边界和第二周边边缘之间。 电源布线和接地布线分别沿着第一和第二外围边缘延伸。 多个pMIS布线和多个nMIS布线分别布置在沿着第一方向延伸并且沿第二方向以单个间距布置的多个第一虚拟线和多条第二虚拟线上。 最接近边界的第一虚拟线和最靠近边界的第二虚拟线之间具有大于单个间距的间距。