公开(公告)号：US20160241177A1

公开(公告)日：2016-08-18

申请号：US14946671

申请日：2015-11-19

Applicant: Renesas Electronics Corporation

Inventor： Minoru KUROSAWA ,  Kichiya ITAGAKI ,  Seigi ISHIJI

IPC: H02P23/00 ,  H02P29/00

CPC classification number: H02P23/0077 ,  H02P6/10 ,  H02P29/00 ,  H02P29/50

Abstract: The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value. A selector outputs, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value.

Abstract translation: 本发明旨在减少电动机的噪声和振动。 第一占空比校正电路产生第一校正占空指令值，其以与占空指令值的增量相同的增量变化，并且其中反映作为常数的偏移值。 第二占空比校正电路产生以与占空指令值的增量不同的增量改变的第二校正占空比指令值。 A选择器根据占空指令值和占空比基准值之间的大小关系，输出第一校正占空指令值和第二校正占空指令值中的任何一个作为校正占空指令值。

公开(公告)号：US20180096704A1

公开(公告)日：2018-04-05

申请号：US15717035

申请日：2017-09-27

Applicant: Renesas Electronics Corporation

Inventor： Minoru KUROSAWA ,  Kichiya ITAGAKI ,  Seigi ISHIJI

IPC: G11B7/085 ,  G11B19/20 ,  G11B21/02 ,  G11B19/02 ,  G11B5/54 ,  G11B21/12 ,  G11B21/18

CPC classification number: G11B19/2063 ,  G11B5/54 ,  G11B19/04 ,  G11B19/2081 ,  G11B21/02 ,  G11B21/12

Abstract: A control device is provided which can perform a retraction operation of a head included in a disk storage device with lower power consumption.The control device of the disk storage device includes a control unit that controls a motor and retracts the head from over a disk to a ramp mechanism when power supply is shut down, an acquisition unit that acquires information related to a moving distance of the head that retracts to the ramp mechanism, and a calculation unit that calculates the moving distance of the head based on the information acquired by the acquisition unit. The control unit switches an operation of the motor from a first retract operation to a second retract operation when determining that the head reaches a first position after passing through an inclined surface of the ramp mechanism based on the moving distance calculated by the calculation unit.

公开(公告)号：US20190006964A1

公开(公告)日：2019-01-03

申请号：US16004494

申请日：2018-06-11

Applicant: Renesas Electronics Corporation

Inventor： Minoru KUROSAWA ,  Seigi ISHIJI

IPC: H02P3/12 ,  H02P7/025 ,  H02P7/29 ,  H02P7/293 ,  H02P29/68 ,  G11B19/20

CPC classification number: H02P3/12 ,  G11B5/54 ,  G11B15/46 ,  G11B19/2009 ,  G11B19/28 ,  H02P3/22 ,  H02P6/24 ,  H02P7/025 ,  H02P7/29 ,  H02P7/293 ,  H02P29/68 ,  H02P2205/01

Abstract: A PWM modulation circuit controls low-side transistors of three phases (u, v, and w) all to be into an ON state, when a brake current flows, controls, in a period in which a brake current flows in one phase, a transistor for sensing (u, v, and w) of this one phase to be into an ON state, and controls, in a period of two phases, the transistor for sensing (u, v, and w) of three phases to be into an OFF state. When the brake current is to flow, sense-phase control circuits of three phases controls a transistor for sensing (u, v, and w), in a phase in which the brake current is in a sink direction, to be into an ON state, and controls the transistor for sensing (u, v, and w) in a phase in which it is in an opposite direction, to be into an OFF state.

公开(公告)号：US20210273589A1

公开(公告)日：2021-09-02

申请号：US17148402

申请日：2021-01-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Seigi ISHIJI ,  Minoru KUROSAWA

IPC: H02P6/182 ,  H02M7/5387 ,  H02P6/18 ,  H02P6/28

Abstract: A gate drive semiconductor device includes: external terminals to which PWM control signals are supplied; external terminals outputting a drive signal for driving a three-phase BLDC motor; external terminals to which the counter electromotive voltage generated by driving the three-phase BLDC motor is supplied; a zero-cross determination unit generating an interrupt signal indicating timing at which the counter electromotive voltage intersects with a midpoint potential of the three-phase BLDC motor based on the PWM control signal and the counter electromotive voltage; and an external terminal outputting the interrupt signal.