公开(公告)号：US20210334152A1

公开(公告)日：2021-10-28

申请号：US16859463

申请日：2020-04-27

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi HAYASE ,  Shinichi SHIBAHARA ,  Yuki HAYAKAWA ,  Yoichi YUYAMA

IPC: G06F11/07

Abstract: A semiconductor device has a timer unit and a processing unit. The timer unit includes a binary counter, a first converter that converts a first count value output from the binary counter to a gray code to output as first gray code data. The processing unit includes a first synchronizer that captures the first gray code data transferred from the timer unit in synchronization with the system clock signal and outputs the captured first gray code data as second gray code data, and a fault detection unit that generates a data for fault detection based on the first gray code data transferred from the timer unit and compares a second count value based on the second gray code data with a third counter value based on the data for fault detection.

公开(公告)号：US20240143465A1

公开(公告)日：2024-05-02

申请号：US18452305

申请日：2023-08-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi HAYASE ,  Yuki HAYAKAWA ,  Toshiyuki KAYA ,  Kyohei YAMAGUCHI ,  Takahiro IRITA ,  Shinichi SHIBAHARA

IPC: G06F11/22

CPC classification number: G06F11/2284

Abstract: A semiconductor device includes first and second processor cores configured to perform a lock step operation and including first and second scan chains. The semiconductor device further includes a scan test control unit that controls a scan test of the first and second processor cores using the first and second scan chains, and a start-up control unit that outputs a reset signal for bringing the first and second processor cores into a reset state. The start-up control unit outputs an initialization scan request before the start of a lock step operation, and the scan test control unit performs an initialization scan test operation on the first and second processor cores by using an initialization pattern.

公开(公告)号：US20220027225A1

公开(公告)日：2022-01-27

申请号：US17494630

申请日：2021-10-05

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi HAYASE ,  Shinichi SHIBAHARA ,  Yuki HAYAKAWA ,  Yoichi YUYAMA

IPC: G06F11/07

Abstract: A semiconductor device has a timer unit and a processing unit. The timer unit includes a binary counter, a first converter that converts a first count value output from the binary counter to a gray code to output as first gray code data. The processing unit includes a first synchronizer that captures the first gray code data transferred from the timer unit in synchronization with the system clock signal and outputs the captured first gray code data as second gray code data, and a fault detection unit that generates a data for fault detection based on the first gray code data transferred from the timer unit and compares a second count value based on the second gray code data with a third counter value based on the data for fault detection.