公开(公告)号：US20240118923A1

公开(公告)日：2024-04-11

申请号：US18459277

申请日：2023-08-31

Applicant: QUALCOMM Incorporated

Inventor： Corrado RAINONE ,  Wei David ZHANG ,  Roberto BONDESAN ,  Markus PESCHL ,  Mukul GAGRANI ,  Wonseok JEON ,  Edward TEAGUE ,  Piero ZAPPI ,  Weiliang ZENG ,  Christopher LOTT

IPC: G06F9/48

CPC classification number: G06F9/4881 ,  G06N5/04

Abstract: A processor-implemented method includes generating, by a scheduling model, a group of schedules from a computation graph associated with a task, each node on the computation graph being associated with an operation of an artificial neural network, each schedule of the group of schedules associating each node of the computation graph with a processor of a group of processors of a hardware device. The processor-implemented method also includes testing one or more schedules of the group of schedules on the hardware device or a model of the hardware device. The processor-implemented method further includes selecting a schedule of the one or more schedules based on testing the one or more schedules, the selected schedule satisfying a selection condition.