公开(公告)号：US12130773B2

公开(公告)日：2024-10-29

申请号：US18084266

申请日：2022-12-19

Applicant: QUALCOMM Incorporated

Inventor： Bharat Kumar Rangarajan ,  Varun Jindal

IPC: G06F12/08 ,  G06F12/0875 ,  G06F15/78

CPC classification number: G06F15/7814 ,  G06F12/0875 ,  G06F2212/452

Abstract: Aspects of the disclosure are directed to a quality of service (QOS) assignment policy for processor applications in a system on a chip (SoC). In accordance with one aspect, the system on a chip (SoC) includes an applications central processing unit (CPU), wherein the applications CPU comprises a quality of service (QOS) database table configured to list a plurality of QoS metrics associated with a plurality of processor threads, wherein at least one of the plurality of QoS metrics is used to determine a dynamic clock and voltage scaling (DCVS) operating point; a graphics processing unit (GPU) coupled to the applications CPU; and a common interconnection databus coupled to the applications CPU and the GPU.