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公开(公告)号:US20230087897A1
公开(公告)日:2023-03-23
申请号:US17483142
申请日:2021-09-23
Applicant: QUALCOMM Incorporated
Inventor: Shih-Wei CHOU , Todd Morgan RASMUS , Ying DUAN , Abhay DIXIT
Abstract: A receiving apparatus includes a terminating network for a three-wire serial bus and a feedback circuit. Each wire of the three-wire serial bus may be coupled through a resistance to a common node of the terminating network. The feedback circuit has a first amplifier circuit having an input coupled to the common node, a comparator that receives an output of the first amplifier circuit as a first input and a reference voltage as a second input, and a second amplifier circuit responsive to an output of the comparator and configured to inject a current through the common node.
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公开(公告)号:US20230143127A1
公开(公告)日:2023-05-11
申请号:US17453967
申请日:2021-11-08
Applicant: QUALCOMM Incorporated
Inventor: Todd Morgan RASMUS , Shih-Wei CHOU
CPC classification number: H03F3/45183 , H03F1/0227 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2200/91 , H03F2203/45008
Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.
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公开(公告)号:US20200183440A1
公开(公告)日:2020-06-11
申请号:US16211178
申请日:2018-12-05
Applicant: QUALCOMM Incorporated
Inventor: Todd Morgan RASMUS
Abstract: Aspects of the disclosure are directed to generating a reference voltage with trim adjustment. Accordingly, a reference voltage with trim adjustment is generating which involves generating a trim current using at least one of a plurality of selectable parallel elements; inputting the trim current to parallel resistor branches to generate a first scaled voltage; and combining a first voltage with the first scaled voltage to generate the reference voltage.
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