C-PHY RECEIVER WITH SELF-REGULATED COMMON MODE SERVO LOOP

    公开(公告)号:US20230087897A1

    公开(公告)日:2023-03-23

    申请号:US17483142

    申请日:2021-09-23

    Abstract: A receiving apparatus includes a terminating network for a three-wire serial bus and a feedback circuit. Each wire of the three-wire serial bus may be coupled through a resistance to a common node of the terminating network. The feedback circuit has a first amplifier circuit having an input coupled to the common node, a comparator that receives an output of the first amplifier circuit as a first input and a reference voltage as a second input, and a second amplifier circuit responsive to an output of the comparator and configured to inject a current through the common node.

    PRECISION BANDGAP REFERENCE WITH TRIM ADJUSTMENT

    公开(公告)号:US20200183440A1

    公开(公告)日:2020-06-11

    申请号:US16211178

    申请日:2018-12-05

    Abstract: Aspects of the disclosure are directed to generating a reference voltage with trim adjustment. Accordingly, a reference voltage with trim adjustment is generating which involves generating a trim current using at least one of a plurality of selectable parallel elements; inputting the trim current to parallel resistor branches to generate a first scaled voltage; and combining a first voltage with the first scaled voltage to generate the reference voltage.

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