公开(公告)号：US09836414B2

公开(公告)日：2017-12-05

申请号：US14572520

申请日：2014-12-16

Applicant: QUALCOMM Incorporated

Inventor： Sudeep Kittilingal ,  Jayanth Mandayam ,  Ron Keidar

IPC: G06F21/62 ,  G06F12/14 ,  G06F21/79

CPC classification number: G06F12/1408 ,  G06F21/62 ,  G06F21/6218 ,  G06F21/79 ,  G06F2221/2113

Abstract: A processor for processing data from a buffer memory, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associated with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory.