-
公开(公告)号：US20210240442A1
公开(公告)日：2021-08-05
申请号：US16779491
申请日：2020-01-31
Applicant: QUALCOMM Incorporated
Inventor： Ankit SRIVASTAVA , Seyed Arash MIRHAJ , Guoqing MIAO , Seyfi BAZARJANI
IPC: G06F7/544 , G11C11/419 , G11C11/412
Abstract: A compute-in-memory bitcell is provided that includes a pair of cross-coupled inverter for storing a stored bit. The compute-in-memory bitcell includes a logic gate for multiplying the stored bit with an input vector bit. An output node for the logic gate connects to a second plate of a capacitor. A first plate of the capacitor connects to a read bit line.
Search Results
1
records
(took 0.01 seconds)
筛选
AND
AND
过滤
NOT
NOT
Scan to Join
