公开(公告)号：US12001288B2

公开(公告)日：2024-06-04

申请号：US17484310

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Kunal Desai ,  Kiran Kumar Malipeddi ,  Shekar Babu Merla ,  Pranav Agrawal

IPC: G06F11/00 ,  G06F11/14 ,  G06F13/16 ,  G11C29/38

CPC classification number: G06F11/1428 ,  G06F11/1417 ,  G06F13/1668 ,  G11C29/38

Abstract: Various embodiments may include methods and systems for reconfiguring memory channel routing within a system-on-a-chip (SoC). A method may include obtaining first error information in response to misbehavior in a first memory channel communicatively connected to a network interface unit (NIU) of the SoC. The method may further include storing the first error information in non-volatile memory that is read upon booting of the SoC, and rebooting the SoC including the first memory channel. The method may further include configuring the first memory channel to be communicatively disconnected from the NIU and configuring a second memory channel to be communicatively connected to the NIU in response to reading the stored first error information during reboot.

公开(公告)号：US12265712B2

公开(公告)日：2025-04-01

申请号：US18447159

申请日：2023-08-09

Applicant: QUALCOMM Incorporated

Inventor： Prasad Rao Koleti ,  Pranav Agrawal ,  Vipan Kumar Bindal ,  Shriharsha Chebbi ,  Ankith Agarwal ,  Raja Simha Revanuru

IPC: G06F3/06

Abstract: Various embodiments include methods and devices for implementing scaling memory frequency configuration by a computing device. Embodiments may include comparing at least a memory refresh rate, a memory size, at least one use case bandwidth of transmission between the memory and a system on chip (SoC), and a use case latency of transmission between the memory and the SoC with at least one stored memory refresh rate, at least one stored memory size, at least one stored use case bandwidth of transmission between the memory and the SoC, and at least one stored use case latency of transmission between the memory and the SoC, selecting a memory frequency based on a result of the comparison, and configuring the memory for the memory frequency. Some embodiments may include issuing an alarm indicating changing the use for the memory to be able to achieve a use case parameter.

公开(公告)号：US20230098902A1

公开(公告)日：2023-03-30

申请号：US17484310

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Kunal Desai ,  Kiran Kumar Malipeddi ,  Shekar Babu Merla ,  Pranav Agrawal

IPC: G06F11/14 ,  G11C29/38 ,  G06F13/16

Abstract: Various embodiments may include methods and systems for reconfiguring memory channel routing within a system-on-a-chip (SoC). A method may include obtaining first error information in response to misbehavior in a first memory channel communicatively connected to a network interface unit (NIU) of the SoC. The method may further include storing the first error information in non-volatile memory that is read upon booting of the SoC, and rebooting the SoC including the first memory channel. The method may further include configuring the first memory channel to be communicatively disconnected from the NIU and configuring a second memory channel to be communicatively connected to the NIU in response to reading the stored first error information during reboot.