公开(公告)号：US12264466B2

公开(公告)日：2025-04-01

申请号：US18181035

申请日：2023-03-09

Applicant: QUALCOMM Incorporated

Inventor： Kiran Kumar Malipeddi ,  Rahul Gulati

IPC: E03C1/046

Abstract: Various embodiments include components (e.g., a processor in a vehicle advanced driver assistance system) configured to identify subsystems that require testing in order to verify their compliance with a safety requirement. The components may determine whether verification of compliance requires that the subsystems be tested at PON, at POFF, during runtime or a combination thereof, dynamically determine the achievable parallelism for testing the identified subsystems, dynamically determine coverage level requirements for performing or executing built in self tests (BISTs) on each identified subsystem, and perform or execute the BISTs on the subsystems at the determined level of parallel and at the determined coverage level.

公开(公告)号：US20230098902A1

公开(公告)日：2023-03-30

申请号：US17484310

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Kunal Desai ,  Kiran Kumar Malipeddi ,  Shekar Babu Merla ,  Pranav Agrawal

IPC: G06F11/14 ,  G11C29/38 ,  G06F13/16

Abstract: Various embodiments may include methods and systems for reconfiguring memory channel routing within a system-on-a-chip (SoC). A method may include obtaining first error information in response to misbehavior in a first memory channel communicatively connected to a network interface unit (NIU) of the SoC. The method may further include storing the first error information in non-volatile memory that is read upon booting of the SoC, and rebooting the SoC including the first memory channel. The method may further include configuring the first memory channel to be communicatively disconnected from the NIU and configuring a second memory channel to be communicatively connected to the NIU in response to reading the stored first error information during reboot.

公开(公告)号：US12001288B2

公开(公告)日：2024-06-04

申请号：US17484310

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Kunal Desai ,  Kiran Kumar Malipeddi ,  Shekar Babu Merla ,  Pranav Agrawal

IPC: G06F11/00 ,  G06F11/14 ,  G06F13/16 ,  G11C29/38

CPC classification number: G06F11/1428 ,  G06F11/1417 ,  G06F13/1668 ,  G11C29/38

Abstract: Various embodiments may include methods and systems for reconfiguring memory channel routing within a system-on-a-chip (SoC). A method may include obtaining first error information in response to misbehavior in a first memory channel communicatively connected to a network interface unit (NIU) of the SoC. The method may further include storing the first error information in non-volatile memory that is read upon booting of the SoC, and rebooting the SoC including the first memory channel. The method may further include configuring the first memory channel to be communicatively disconnected from the NIU and configuring a second memory channel to be communicatively connected to the NIU in response to reading the stored first error information during reboot.

公开(公告)号：US11634895B2

公开(公告)日：2023-04-25

申请号：US17161731

申请日：2021-01-29

Applicant: QUALCOMM Incorporated

Inventor： Kiran Kumar Malipeddi ,  Rahul Gulati

IPC: E03C1/046

Abstract: Various embodiments include components (e.g., a processor in a vehicle advanced driver assistance system) configured to identify subsystems that require testing in order to verify their compliance with a safety requirement. The components may determine whether verification of compliance requires that the subsystems be tested at PON, at POFF, during runtime or a combination thereof, dynamically determine the achievable parallelism for testing the identified subsystems, dynamically determine coverage level requirements for performing or executing built in self tests (BISTs) on each identified subsystem, and perform or execute the BISTs on the subsystems at the determined level of parallel and at the determined coverage level.