公开(公告)号：US20230281143A1

公开(公告)日：2023-09-07

申请号：US17688607

申请日：2022-03-07

Applicant: QUALCOMM INCORPORATED

Inventor： Philippe BOUCARD ,  Christophe LAYER ,  Luc MONTPERRUS

IPC: G06F13/40 ,  G06F13/42 ,  G06F15/78

CPC classification number: G06F13/4018 ,  G06F13/4282 ,  G06F13/4059 ,  G06F15/7807

Abstract: Data may be communicated from a sender device to a receiver device over enabled or selected byte positions or other data bit groups of a data bus. The sender device may determine data values to be sent over the data bus and may determine which byte positions are enabled or selected and which are not selected. The sender device may also determine a code. The code may be a value that is not included in the data values to be sent over the data bus. The sender device may then send the selected data values in selected byte positions of the data bus and send the code in non-selected byte positions of the data bus. The sender device may also send the code to the receiver device separately from the data bit lanes of the data bus.

公开(公告)号：US20210382651A1

公开(公告)日：2021-12-09

申请号：US16894550

申请日：2020-06-05

Applicant: QUALCOMM Incorporated

Inventor： Jean-Jacques LECLER ,  Philippe BOUCARD

IPC: G06F3/06

Abstract: In some aspects, the present disclosure provides a method for scheduling transactions for a memory by a scheduler. The method includes receiving a plurality of transactions, each of the plurality of transactions being associated with a corresponding priority level. The method also includes selecting one or more transactions of the plurality of transactions that meet one or more constraints based on one or more past transactions scheduled for the memory by the scheduler. The method also includes determining whether at least one transaction of the one or more transactions satisfies a threshold priority level.