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公开(公告)号：US12088303B1
公开(公告)日：2024-09-10
申请号：US18173679
申请日：2023-02-23
Applicant: QUALCOMM Incorporated
CPC classification number: H03K5/01 , G06F1/06 , H03K2005/00019 , H03K2005/00286
Abstract: A clock generation apparatus has a delay circuit, a phase selection circuit, and a phase measurement circuit. The delay circuit outputs a first signal that is a delayed version of an input signal. The phase selection circuit receives the input signal and one or more phase-shifted versions of the input signal and outputs a second signal that is a phase-shifted version of the input signal. The phase measurement circuit compares the phases of the first signal and the second signal and provides a first output that controls phase of the second signal relative to the input signal. The phase measurement circuit also provides a second output that controls a delay applied by the delay circuit to the input signal to generate the first signal.
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