Abstract:
Techniques are described for using a texture unit to perform operations of a shader processor. Some operations of a shader processor are repeatedly executed until a condition is satisfied, and in each execution iteration, the shader processor accesses the texture unit. Techniques are described for the texture unit to perform such operations until the condition is satisfied.
Abstract:
Techniques are described for stereoscopic view generation. A graphics processing unit (GPU) may combine attribute information for two or more corresponding vertices of corresponding primitives in different views. The GPU may process the combined attributed information to generate graphics data for the stereoscopic view.
Abstract:
A method and apparatus for ray tracing may include a method, manufacture and apparatus for ray tracing that may include dividing a render target into a plurality of bins. Next, a visibility pass is performed using ray tracing to generate a visibility stream such that the visibility stream indicates, for each bin of the plurality of bins, which primitives are visible in the bin. Then, for at least one bin of the plurality of bins, each primitive in the bin that is indicated in the visibility stream as being visible in the bin is rendered.
Abstract:
Techniques are described for using a texture unit to perform operations of a shader processor. Some operations of a shader processor are repeatedly executed until a condition is satisfied, and in each execution iteration, the shader processor accesses the texture unit. Techniques are described for the texture unit to perform such operations until the condition is satisfied.
Abstract:
A method and apparatus for ray tracing may include using texture pipeline hardware of a GPU to perform ray intersection testing for a first ray and a first shape. Using the texture pipeline hardware to perform ray intersection testing may include calculating a plurality of dot products with the texture pipeline hardware, and determining whether the first ray intersects the first shape based on the plurality of dot products.
Abstract:
A method and apparatus for ray tracing may include using texture pipeline hardware of a GPU to perform ray intersection testing for a first ray and a first shape. Using the texture pipeline hardware to perform ray intersection testing may include calculating a plurality of dot products with the texture pipeline hardware, and determining whether the first ray intersects the first shape based on the plurality of dot products.
Abstract:
A render output unit running on at least one processor may receive a source pixel value to be written to a pixel location in a render target, wherein the source pixel value is associated with a source node in a hierarchical structure. The render output unit may receive a destination pixel value of the pixel location in the render target, wherein the destination pixel value is associated with a destination node in the hierarchical structure. The render output unit may determine a lowest common ancestor node of the source node and the destination node in the hierarchical structure. The render output unit may output a resulting pixel value associated with the lowest common ancestor node of the source node and the destination node to the pixel location in the render target.
Abstract:
A method and apparatus for ray tracing may include a method, manufacture and apparatus for ray tracing that may include dividing a render target into a plurality of bins. Next, a visibility pass is performed using ray tracing to generate a visibility stream such that the visibility stream indicates, for each bin of the plurality of bins, which primitives are visible in the bin. Then, for at least one bin of the plurality of bins, each primitive in the bin that is indicated in the visibility stream as being visible in the bin is rendered.
Abstract:
Techniques are described for using a texture unit to perform operations of a shader processor. Some operations of a shader processor are repeatedly executed until a condition is satisfied, and in each execution iteration, the shader processor accesses the texture unit. Techniques are described for the texture unit to perform such operations until the condition is satisfied.
Abstract:
A render output unit running on at least one processor may receive a source pixel value to be written to a pixel location in a render target, wherein the source pixel value is associated with a source node in a hierarchical structure. The render output unit may receive a destination pixel value of the pixel location in the render target, wherein the destination pixel value is associated with a destination node in the hierarchical structure. The render output unit may determine a lowest common ancestor node of the source node and the destination node in the hierarchical structure. The render output unit may output a resulting pixel value associated with the lowest common ancestor node of the source node and the destination node to the pixel location in the render target.