公开(公告)号：US20180331564A1

公开(公告)日：2018-11-15

申请号：US15712770

申请日：2017-09-22

Applicant: QUALCOMM Incorporated

Inventor： Chunping SONG ,  Jialei XU ,  Stuart PULLEN ,  Steve HAWLEY ,  Neal HOROVITZ ,  Shashank Prakash MANE

IPC: H02J7/16 ,  H02J7/00

CPC classification number: H02J7/163 ,  G01R19/0092 ,  H02J7/0013 ,  H02J7/0024 ,  H02J7/0052 ,  H02J7/022 ,  H02J2007/0059 ,  H02J2007/0062

Abstract: Certain aspects of the present disclosure generally relate to reducing the size of parallel charging circuits for charging a battery in a portable device, while still effectively providing input current sensing and reverse current blocking capabilities. One example battery charging circuit generally includes: (1) a first charging circuit comprising a first charging output connectable to a battery and a first converter to provide power to the first charging output; and (2) a second charging circuit comprising a second charging output connectable to the battery, a second converter to provide power to the second charging output, a first transistor coupled between an output of the second converter and the second charging output, and a current-sensing circuit coupled to the output of the second converter to sense a current through the first transistor.

公开(公告)号：US20180331624A1

公开(公告)日：2018-11-15

申请号：US15973787

申请日：2018-05-08

Applicant: QUALCOMM Incorporated

Inventor： Stuart PULLEN ,  Michael BUI ,  Chunping SONG ,  Jialei XU

IPC: H02M3/158 ,  H02M1/088

CPC classification number: H02M3/158 ,  H02M1/088 ,  H02M3/156 ,  H02M3/1588 ,  H02M2001/0009

Abstract: Certain aspects of the present disclosure provide methods and apparatus for current sensing and error correction, or at least adjustment, for a switching regulator. One example current-sensing circuit generally includes a first amplifier, a buffer, a low-pass filter, a first switch coupled between an output of the first amplifier and an input of the buffer, a second switch coupled between the output of the first amplifier and an input of the low-pass filter, a third switch coupled between an output of the buffer and the input of the low-pass filter, and a fourth switch coupled between the input of the low-pass filter and a reference node for the circuit.