公开(公告)号：US20190304905A1

公开(公告)日：2019-10-03

申请号：US15992473

申请日：2018-05-30

Applicant: QUALCOMM Incorporated

Inventor： Tin Tin WEE ,  Alvin Leng Sun LOKE ,  Jacob SCHNEIDER

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/02 ,  H01L49/02 ,  H01L27/06

Abstract: Co-placement of resistor and other devices to improve area and performance is disclosed. In one implementation, a semiconductor circuit includes a resistor residing on a back end of line (BEOL) resistor layer, a plurality of interlevel metal vias coupling the BEOL resistor layer to one or more metal layers underneath the BEOL resistor layer, and a diode residing on a silicon substrate underneath the one or more metal layers, wherein a planar surface of the diode and a planar surface of the resistor at least partially overlap with each other, and the diode and the resistor are coupled to each other through the plurality of interlevel metal vias.

公开(公告)号：US20200235737A1

公开(公告)日：2020-07-23

申请号：US16743872

申请日：2020-01-15

Applicant: QUALCOMM Incorporated

Inventor： Young Uk YIM ,  Jacob SCHNEIDER ,  Satish KRISHNAMOORTHY ,  Ashwin SETHURAM ,  Chang Ki KWON ,  Mostafa Naguib ABDULLA

IPC: H03K19/003 ,  H03K19/017 ,  G06F3/06

Abstract: A hybrid output data path is provided that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.