MIXED-MODE DEPTH IMAGING
    1.
    发明公开

    公开(公告)号:US20240070886A1

    公开(公告)日:2024-02-29

    申请号:US18261096

    申请日:2021-09-24

    CPC classification number: G06T7/521 G01S17/08 G01S17/894 G06T2207/10028

    Abstract: Systems and techniques are described for generating depth map(s). For Depth Imaging System instance, a process can include obtaining a frame including a reflected pattern of light generated based on a pattern of light that is based on a primitive including a set of flight (ToF) sensor, a first distance measurement associated with a pixel of the frame, and determining a search space within the primitive based on the first distance measurement. The process can include determining, based on searching the search space, a feature of the primitive corresponding to a region around the pixel of the frame. The process can include determining a second distance measurement associated with the pixel of the frame based on determining the feature of the primitive. The process can include generating a depth map based at least in part on the second distance measurement.

    DECODING AN IMAGE FOR ACTIVE DEPTH SENSING TO ACCOUNT FOR OPTICAL DISTORTIONS

    公开(公告)号:US20230267628A1

    公开(公告)日:2023-08-24

    申请号:US18005106

    申请日:2021-09-20

    CPC classification number: G06T7/521 G06T7/11

    Abstract: Aspects of the disclosure relate to decoding an image for active depth sensing. An example method includes receiving an image. The image includes one or more reflections of a distribution of light. The method also includes sampling a first region of the image using a first sampling grid to generate a first image sample, sampling a second region of the image using a second sampling grid different from the first sampling grid to generate a second image sample, determining a first depth value based on the first image sample, and determining a second depth value based on the second image sample.

    SORT INSTRUCTIONS FOR RECONFIGURABLE COMPUTING CORES

    公开(公告)号:US20190235863A1

    公开(公告)日:2019-08-01

    申请号:US16004335

    申请日:2018-06-08

    CPC classification number: G06F9/3001 G06F9/30072

    Abstract: According to various aspects, a sorting instruction described herein may advantageously be implemented using intrinsic properties of a reconfigurable computing engine. For example, the reconfigurable computing engine may comprise an arithmetic logic unit (ALU) or other suitable operational unit(s) that can perform one or more comparisons among a given plurality of inputs and output a plurality of select signals that at least indicate maximum and minimum values among the given plurality of inputs. In addition, the reconfigurable computing engine may comprise various multiplexers that make up an interconnect fabric coupled to the ALU or other suitable operational units, wherein the multiplexers may be arranged to receive the plurality of inputs and the plurality of select signals such that the plurality of multiplexers can be dynamically configured to perform the permutations to sort the plurality of inputs.

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