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公开(公告)号：US11545897B2
公开(公告)日：2023-01-03
申请号：US17021591
申请日：2020-09-15
Applicant: QUALCOMM Incorporated
Inventor： Ta-Tung Yen , Guoyong Guo , Chunping Song , Hector Ivan Oporta
Abstract: Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit—such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween—in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).
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公开(公告)号：US10185342B2
公开(公告)日：2019-01-22
申请号：US15703825
申请日：2017-09-13
Applicant: QUALCOMM Incorporated
Inventor： Aaron Melgar , Christian Sporck , Chunping Song , David Wong , Rashed Hoque , Neal Horovitz , Hector Ivan Oporta , Daryl Bergstrom
Abstract: A configurable charge converter may include an adaptive low-dropout regulator. The adaptive low-dropout regulator may include a headroom detection circuit and a power supply controller. The headroom detection circuit may monitor a voltage drop across a field effect transistor (FET) and cause a programmable power supply to increase or decrease an output voltage accordingly. In some aspects, the configurable charge converter may include an adaptive low-dropout regulator and a buck/boost converter. The output power of the configurable charge controller may be provided by the adaptive low-dropout regulator, the buck/boost converter, or by both the adaptive low-dropout regulator and the buck/boost converter operating in combination.
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公开(公告)号：US11923715B2
公开(公告)日：2024-03-05
申请号：US16914160
申请日：2020-06-26
Applicant: Qualcomm Incorporated
Inventor： Chunping Song , Cheong Kun , Xiaolin Gao , Sanghwa Jung , Yue Jing
CPC classification number: H02J7/007192 , H02J7/02 , H02J2207/20
Abstract: An apparatus is disclosed for adaptive multi-mode charging. In an example aspect, the apparatus includes at least one charger having a first node and a second node. The at least one charger is configured to accept an input voltage at the first node. The at least one charger is also configured to selectively operate in a first mode to generate a first output voltage at the second node that is greater than or less than the input voltage or operate in a second mode to generate a second output voltage at the second node that is substantially equal to the input voltage.
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公开(公告)号：US20210194266A1
公开(公告)日：2021-06-24
申请号：US16914160
申请日：2020-06-26
Applicant: Qualcomm Incorporated
Inventor： Chunping Song , Cheong Kun , Xiaolin Gao , Sanghwa Jung , Yue Jing
Abstract: An apparatus is disclosed for adaptive multi-mode charging. In an example aspect, the apparatus includes at least one charger having a first node and a second node. The at least one charger is configured to accept an input voltage at the first node. The at least one charger is also configured to selectively operate in a first mode to generate a first output voltage at the second node that is greater than or less than the input voltage or operate in a second mode to generate a second output voltage at the second node that is substantially equal to the input voltage.
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公开(公告)号：US20210083501A1
公开(公告)日：2021-03-18
申请号：US17025789
申请日：2020-09-18
Applicant: Qualcomm Incorporated
Inventor： Cheong Kun , Chunping Song , Guoyong Guo
IPC: H02J7/00
Abstract: An apparatus is disclosed for parallel charging of at least one power storage unit. In example implementations, an apparatus includes a charging system. The charging system includes a first charger having a first current path and a second charger having a second current path. The charging system also includes a charging controller coupled to the first current path. The charging system further includes an indication path coupled between the second current path and the charging controller.
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Patent Agency Ranking
公开(公告)号：US12237771B2
公开(公告)日：2025-02-25
申请号：US18489639
申请日：2023-10-18
Applicant: QUALCOMM Incorporated
Inventor： Sanghwa Jung , Chunping Song , Ta-Tung Yen , Yue Jing
Abstract: A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.
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7.发明授权公开(公告)号：US11650644B2
公开(公告)日：2023-05-16
申请号：US17445324
申请日：2021-08-18
Applicant: QUALCOMM Incorporated
CPC classification number: G06F1/266 , G06F13/385 , G06F13/4022 , G06F13/4081 , G06F13/4282 , G06F13/4295 , G06F2213/0042
Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.
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公开(公告)号：US11606031B1
公开(公告)日：2023-03-14
申请号：US17649527
申请日：2022-01-31
Applicant: QUALCOMM Incorporated
Inventor： Hector Ivan Oporta , Daragh MacGabhann , Chunping Song , Yi Wang , Ji Hoon Hyun
IPC: H02M3/158 , H03K19/0185 , H03K17/0412
Abstract: Power supply circuit having low quiescent current for a bypass mode. One example power supply circuit generally includes a transistor; a switching node coupled to a source of the transistor; a power supply rail; a capacitor having a first terminal coupled to the power supply rail and having a second terminal coupled to the switching node; a gate driver having an output coupled to a gate of the transistor, having a first power input coupled to the power supply rail, and having a second power input coupled to the switching node; logic having a first input coupled to the first terminal of the capacitor, having a second input coupled to the second terminal of the capacitor, and having a first output; and a pullup circuit having a control input coupled to a second output of the logic and having an output coupled to the gate of the transistor.
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公开(公告)号：US11557964B2
公开(公告)日：2023-01-17
申请号：US17334642
申请日：2021-05-28
Applicant: Qualcomm Incorporated
Inventor： Stuart Pullen , Jialei Xu , Chunping Song , Ta-Tung Yen
Abstract: An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.
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公开(公告)号：US12062938B2
公开(公告)日：2024-08-13
申请号：US17025789
申请日：2020-09-18
Applicant: Qualcomm Incorporated
Inventor： Cheong Kun , Chunping Song , Guoyong Guo
IPC: H02J7/00
CPC classification number: H02J7/00714 , H02J7/0047 , H02J2207/20 , H02J2207/40
Abstract: An apparatus is disclosed for parallel charging of at least one power storage unit. In example implementations, an apparatus includes a charging system. The charging system includes a first charger having a first current path and a second charger having a second current path. The charging system also includes a charging controller coupled to the first current path. The charging system further includes an indication path coupled between the second current path and the charging controller.
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