公开(公告)号：US20160349320A1

公开(公告)日：2016-12-01

申请号：US14794774

申请日：2015-07-08

Applicant: QUALCOMM Incorporated

Inventor： Michael Laisne ,  Bruce Cochrane ,  Fnu Praveen Ipe

IPC: G01R31/3177 ,  G01R31/28

CPC classification number: G01R31/3177 ,  G01R31/2851 ,  G01R31/31705 ,  G01R31/31707 ,  G01R31/3172 ,  G01R31/31724 ,  G01R31/318508 ,  G01R31/318536 ,  G06F11/2236

Abstract: A wrapper for automatic test pattern generation uses the functional bus when testing cores on an integrated circuit device. The functional bus is between the bus wrapper and the cores. During normal operation, the functional bus operates as a standard bus to communicate functional inputs and outputs between the cores and in/out of the integrated circuit device. During test operation, test signals are communicated on the functional bus. As a result, each core does not require its own wrapper; this allows the bus wrapper to reduce the area occupied by test circuitry.

Abstract translation: 在集成电路设备上测试核心时，自动测试模式生成的包装器使用功能总线。 功能总线位于总线封装和内核之间。 在正常操作期间，功能总线作为标准总线进行工作，以在芯体和集成电路器件的输出之间传递功能输入和输出。 在测试操作期间，在功能总线上通信测试信号。 因此，每个核心都不需要自己的包装器; 这使得总线封装可以减少测试电路占用的面积。