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公开(公告)号:US20250077355A1
公开(公告)日:2025-03-06
申请号:US18461287
申请日:2023-09-05
Applicant: QUALCOMM Incorporated
Inventor: Santhosh Reddy AKAVARAM , Prakhar SRIVASTAVA , Aditya Singh PATEL , Yogananda Rao CHILLARIGA
IPC: G06F11/14
Abstract: Aspects of the disclosure provides various systems, apparatuses, and techniques for reducing latencies and power consumption of link training or retraining. In some aspects, the techniques use a specific register to identify the cause of link retraining. Based on the identified reasons of link retraining, the apparatus can selectively skip the initialization of certain redundant lanes of the link. In some aspects, the Universal Chiplet Interconnect Express (UCIe) Link Training and Status State Machine (LTSSM) can be configured to identify whether link retraining is initiated as part of a trainerror or linkerror exit or not. A UCIe device can have a redundant_recovery (RR) register that can be set to different values to identify the cause of link retraining (e.g., due to trainerror/linkerror or not).
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公开(公告)号:US20250086132A1
公开(公告)日:2025-03-13
申请号:US18463852
申请日:2023-09-08
Applicant: QUALCOMM Incorporated
Inventor: Prakhar SRIVASTAVA , Santhosh Reddy AKAVARAM , Aditya Singh PATEL , Ravi Kumar SEPURI
IPC: G06F13/40
Abstract: The disclosed techniques store certain information of functional modules and lanes to optimize a die-to-die interconnect link. Based on the information, the apparatus can optimize a link width and a multi-module link configuration of the interconnect link. An integrated circuit device includes a first die, a second die, and a die-to-die (D2D) interconnect link connected between the first die and the second die. The D2D interconnect link includes a plurality of lanes grouped into a plurality of modules. The apparatus maintains a training result of the D2D interconnect link based on the training of the D2D interconnect link, the training result including one or more link configurations of the plurality of modules. The apparatus selects a link configuration of the one or more link configurations to configure the D2D interconnect link including one or more of the plurality of modules.
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