PERFORMANCE-AWARE SMART FRAMEWORK TO IMPROVE CPU POWER EFFICIENCY IN STATIC DISPLAY READ MODE

    公开(公告)号:US20250093941A1

    公开(公告)日:2025-03-20

    申请号:US18841343

    申请日:2022-04-24

    Abstract: Systems, methods and computer-readable mediums may reduce CPU power costs in a portable computing device (PCD). When logic of the PCD determines that the PCD enters a static display read mode while running an App or an Internet web browser, it determines (1) if display key performance indicator (KPI) headroom of the PCD indicates that cost-saving actions can be performed without degrading visual performance and (2) if there is an active display buffer submission. If the answer to (1) is yes and (2) is no, the logic analyzes hysteresis statistics associated with the CPU entering and exiting low power mode (LPM) to calculate a total number of CPU LPM entries and exits during a preselected time window. The total number is compared to a preselected threshold (TH) value and one or more power cost-saving actions are performed if the total number exceeds the preselected TH value.

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