公开(公告)号：US5751151A

公开(公告)日：1998-05-12

申请号：US630685

申请日：1996-04-12

Applicant: Paul S. Levy ,  Ed Chenoweth

Inventor： Paul S. Levy ,  Ed Chenoweth

IPC: G01R31/28 ,  G01R31/02

CPC classification number: G01R31/2851

Abstract: An integrated circuit test apparatus employs a main test circuit load board which has a circular array of relay card mounts located on it. Auxiliary relays, operated in conjunction with the load board, are mounted in groups on individual relay circuit cards, each card including several relays. The relay circuit cards have connectors on first and second edges thereof; and the connectors on the first edges interconnect with the corresponding receptacles on the relay card mounts. A customized configuration board load ring for the particular integrated circuit device under test (DUT) then is placed over the second edges of the relay circuit cards to interconnect with spring-loaded connectors on these edges to effect the configuration for the operation of the particular DUT which is undergoing test at any given time.

Abstract translation: 集成电路测试装置采用具有位于其上的中继卡座的圆形阵列的主测试电路负载板。 辅助继电器与负载板一起运行，分别安装在各个继电器电路卡上，每个卡包括几个继电器。 继电器电路卡在其第一和第二边缘上具有连接器; 并且第一边缘上的连接器与继电器卡座上的相应插座相互连接。 然后将被测定的特定集成电路器件（DUT）的定制配置板负载环放置在继电器电路卡的第二边缘上，以与这些边缘上的弹簧加载连接器互连，以实现特定DUT的操作配置 在任何给定的时间正在进行测试。