公开(公告)号：US06934776B2

公开(公告)日：2005-08-23

申请号：US10196967

申请日：2002-07-16

Applicant: Patrick L. Connor ,  Linden Minnick ,  Benny Eitan

Inventor： Patrick L. Connor ,  Linden Minnick ,  Benny Eitan

IPC: H04L12/56 ,  G06F3/00

CPC classification number: H04L49/9047 ,  H04L49/90 ,  H04L49/901

Abstract: Two timers are used to improve ingress throughput. Decisions to transfer the ingress packets are made based on when the two timers expire. A first timer is used to time how long a first ingress packet waits before it is transferred. When this first timer expires, the all received ingress packets including the first ingress packet are transferred. A second timer is used to time how long to wait for a new ingress packet to be received. The second timer is reset if a new ingress packet is received before expiration of the second timer. When the second timer expires and no new ingress packet is received during the wait, all received ingress packets including the first ingress packet are transferred.

Abstract translation: 两个定时器用于提高入口吞吐量。 基于两个定时器何时到期来进行传入入口包的决定。 第一个定时器用于计算第一个入口数据包在传输之前等待多长时间。 当该第一定时器到期时，包括第一入口分组的所有接收到的入口分组被传送。 第二个定时器用于计算等待接收新的入口数据包的时间。 如果在第二计时器到期之前接收到新的入口分组，则第二计时器被复位。 当第二定时器到期并且在等待期间没有接收到新的入口分组时，包括第一入口分组的所有接收到的入口分组被传送。

公开(公告)号：US07444642B2

公开(公告)日：2008-10-28

申请号：US10003134

申请日：2001-11-15

Applicant: Linden Minnick ,  Roy Callum ,  Patrick L. Connor

Inventor： Linden Minnick ,  Roy Callum ,  Patrick L. Connor

IPC: G06F3/00 ,  G06F13/28

CPC classification number: G06F13/128

Abstract: The present disclosure describes a method comprising issuing a plurality of commands to a controller, wherein the commands are issued in a first order, and wherein the completion status of commands is written to the memory in a second order, and wherein the second order may be different from the first order. Also described is an apparatus comprising a controller adapted to accept a plurality of commands, wherein the commands are issued in a first order, and completion status of commands is written to the memory in a second order, and wherein the second order may be different from the first order.

Abstract translation: 本公开描述了一种方法，包括向控制器发出多个命令，其中以第一顺序发出命令，并且其中命令的完成状态以二次写入存储器，并且其中第二顺序可以是 不同于第一个订单。 还描述了一种装置，包括适于接受多个命令的控制器，其中以第一顺序发出命令，并且命令的完成状态以二次写入存储器，并且其中第二次命令可以不同于 第一个订单。

公开(公告)号：US07039061B2

公开(公告)日：2006-05-02

申请号：US09963284

申请日：2001-09-25

Applicant: Patrick L. Connor ,  Linden Minnick

Inventor： Patrick L. Connor ,  Linden Minnick

IPC: H04L12/28 ,  H04J3/14 ,  G08C15/00 ,  G06F11/00

CPC classification number: H04L47/34 ,  H04L47/10 ,  H04L47/2441 ,  H04L47/41 ,  H04L47/50 ,  H04L47/6215

Abstract: Methods, apparatus, and articles of manufacture for retaining packet order in multiprocessor systems utilizing multiple transmit queues are disclosed herein. Embodiments of the present invention define multiple transmit queues for a given priority level of packets to enable the multiprocessor system to process and queue packets of equal priority in different transmit queues. Queuing packets of equal priority in different transmit queues minimizes processor time spent attempting to acquire queue-specific resources associated with one particular transmit queue. In addition, embodiments of the present invention provide an assignment mechanism to ensure that packets corresponding to a common flow are queued in the same transmit queue in order to eliminate, to the extent possible, out-or-order packets, which many times results in lost packets and a reduction in realized network throughput.

公开(公告)号：US08856416B2

公开(公告)日：2014-10-07

申请号：US10007082

申请日：2001-12-06

Applicant: Linden Minnick ,  Patrick L. Connor

Inventor： Linden Minnick ,  Patrick L. Connor

IPC: G06F13/24 ,  H04L12/861 ,  H04L29/06

CPC classification number: H04L69/16 ,  H04L49/90 ,  H04L49/9063 ,  H04L69/12 ,  H04L69/161 ,  H04L69/163

Abstract: Numerous embodiments of a method and apparatus for processing latency sensitive electronic data with interrupt moderation are disclosed.

Abstract translation: 公开了用于处理具有中断节制的等待时间敏感电子数据的方法和装置的许多实施例。

公开(公告)号：US08473579B2

公开(公告)日：2013-06-25

申请号：US13468151

申请日：2012-05-10

Applicant: Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

Inventor： Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

IPC: G06F15/16 ,  G06F15/173

CPC classification number: H04L41/0896 ,  H04L12/2852 ,  H04L12/2854

Abstract: Apparatus, systems, and methods to manage networks may operate to receive a packet into an element of an array contained in a memory while a low resource state exists, and to truncate the array at the element responsive to at least one of an indication that the array is full, or an indication that no more packets are available to be received after receiving at least the packet. The receiving and the truncating may be executed by a processor. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 用于管理网络的设备，系统和方法可以操作以在包含在存储器中的阵列的元素中接收分组，同时存在低资源状态，并且响应于以下的指示中的至少一个来截断所述阵列： 阵列已满，或指示在接收至少该数据包后不再有数据包可用。 接收和截断可以由处理器执行。 公开了附加装置，系统和方法。

公开(公告)号：US20120226765A1

公开(公告)日：2012-09-06

申请号：US13468151

申请日：2012-05-10

Applicant: Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

Inventor： Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

IPC: G06F15/167

CPC classification number: H04L41/0896 ,  H04L12/2852 ,  H04L12/2854

Abstract: Apparatus, systems, and methods to manage networks may operate to receive a packet into an element of an array contained in a memory while a low resource state exists, and to truncate the array at the element responsive to at least one of an indication that the array is full, or an indication that no more packets are available to be received after receiving at least the packet. The receiving and the truncating may be executed by a processor. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 用于管理网络的设备，系统和方法可以操作以在包含在存储器中的阵列的元素中接收分组，同时存在低资源状态，并且响应于以下的指示中的至少一个来截断所述阵列： 阵列已满，或指示在接收至少该数据包后不再有数据包可用。 接收和截断可以由处理器执行。 公开了附加装置，系统和方法。

公开(公告)号：US07248593B2

公开(公告)日：2007-07-24

申请号：US10143466

申请日：2002-05-09

Applicant: Linden Minnick ,  Patrick L. Connor

Inventor： Linden Minnick ,  Patrick L. Connor

IPC: H04L12/56

CPC classification number: H04L47/10 ,  H04L47/2441 ,  H04L47/34 ,  H04L47/41 ,  H04L47/50 ,  H04L47/6215

Abstract: A method, apparatus, and article of manufacture for retaining packet order in multiprocessor systems utilizing multiple transmit queues while minimizing spinlocks are disclosed herein. Embodiments of the present invention define multiple transmit queues for a given priority level of packets to allow parallel processing and queuing of packets having equal priority in different transmit queues. Queuing packets of equal priority in different transmit queues minimizes processor time spent attempting to acquire queue-specific resources associated with one particular transmit queue. In addition, embodiments of the present invention provide an assignment mechanism to maximize utilization of the multiple transmit queues by queuing packets corresponding to each transmit request in a next available transmit queue defined for a given priority level. Coordination between hardware and software allows the order of the queued packets to be maintained in the transmission process.

Abstract translation: 本文公开了一种在多处理器系统中保持分组顺序的方法，装置和制品，其中利用多个发送队列同时最小化旋转锁定。 本发明的实施例为给定的优先级分组定义多个发送队列，以允许在不同发送队列中具有相同优先级的分组的并行处理和排队。 在不同发送队列中排队相同优先级的数据包可最大限度地减少尝试获取与一个特定传输队列相关的特定于队列资源的处理器时间。 此外，本发明的实施例提供了一种分配机制，以通过在针对给定优先级定义的下一个可用传输队列中排队对应于每个发送请求的多个发射队列的最大化利用。 硬件和软件之间的协调允许在传输过程中维护排队的数据包的顺序。

公开(公告)号：US08190765B2

公开(公告)日：2012-05-29

申请号：US10183185

申请日：2002-06-25

Applicant: Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

Inventor： Patrick L. Connor ,  Linden Minnick ,  Lucas M. Jenison

IPC: G06F15/16

CPC classification number: H04L41/0896 ,  H04L12/2852 ,  H04L12/2854

Abstract: Computer network apparatus may include a packet-receiving module to receive a packet into an element of a storage array while a low resource state exists, an array truncation module to truncate the array at the element when the array is full or when no more packets are available to be received, and an array indication module to indicate the array after the array truncation module truncates the array. In one embodiment, a system may include a receiving node containing the apparatus. A method may include receiving a packet into an element of an array while a low resource state exists, truncating the array at the element after the array is full or no more packets are available to be received, and indicating the array.

Abstract translation: 计算机网络装置可以包括分组接收模块，用于在存在低资源状态的同时将分组接收到存储阵列的元素中;数组截短模块，用于在阵列已满时或者当没有更多分组时截断该元素处的阵列 可以接收的数据，以及阵列指示模块，用于在数组截断模块截断数组后指示数组。 在一个实施例中，系统可以包括包含该装置的接收节点。 方法可以包括在存在低资源状态的同时将数据包接收到阵列的元素中，在数组完成之后截断元素上的数组或者不再有可用的数据包被接收并且指示数组。

公开(公告)号：US20190042319A1

公开(公告)日：2019-02-07

申请号：US16147118

申请日：2018-09-28

Applicant: Kapil Sood ,  Patrick L. Connor ,  Scott P. Dubal ,  James Robert Hearn ,  Andrew J. Herdrich

Inventor： Kapil Sood ,  Patrick L. Connor ,  Scott P. Dubal ,  James Robert Hearn ,  Andrew J. Herdrich

IPC: G06F9/50 ,  G06F9/455 ,  G06F21/53 ,  G06F12/14 ,  H04L29/06 ,  H04L9/08 ,  H04W12/08

Abstract: System and techniques for multifactor intelligent agent control are described herein. A workload request may be received from a user device via a network. The workload may be instantiated in an isolated environment on an edge computing platform. Here, the isolated environment may be a container or a virtual machine. The instantiation of the workload may include using a hardware security component (SEC) of the mobile edge computing platform to prevent access to data or code of the workload from other environments hosted by the mobile edge computing platform. The workload may then be executed in the isolated environment and a result of the workload returned to the user device.

公开(公告)号：US08730984B2

公开(公告)日：2014-05-20

申请号：US13099215

申请日：2011-05-02

Applicant: Erik K. Mann ,  Patrick L. Connor ,  Diamant Nimrod

Inventor： Erik K. Mann ,  Patrick L. Connor ,  Diamant Nimrod

IPC: H04L12/28

CPC classification number: H04L47/2441 ,  H04L47/10 ,  H04L47/2433 ,  H04L47/245 ,  H04L47/41 ,  H04L47/50 ,  H04L47/6215 ,  Y02D50/30

Abstract: A system includes a host and a network controller coupled to the host by a bus. The system includes logic to classify Transmission Control Protocol/Internet Protocol (TCP/IP) receive packets based on the network source, network destination, port source, and port destination of the respective receive packets; and cause queuing of the receive packets in a one of multiple receive queues based on the classifying such that receive packets having the same network source, network destination, port source, and port destination are to be queued to the same one of the multiple queues for processing.

Abstract translation: 系统包括通过总线耦合到主机的主机和网络控制器。 该系统包括基于相应接收分组的网络源，网络目的地，端口源和端口目的地对传输控制协议/因特网协议（TCP / IP）接收分组进行分类的逻辑; 并且基于分类使得在多个接收队列中的一个接收队列中的接收分组排队，使得具有相同网络源，网络目的地，端口源和端口目的地的接收分组将被排队到多个队列中的相同的一个队列 处理。