公开(公告)号：US11977745B2

公开(公告)日：2024-05-07

申请号：US17886416

申请日：2022-08-11

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ming-Hui Tseng ,  Chia-Lung Ma ,  Zhen-Yu Weng

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679

Abstract: A data retry-read method, a memory storage device, and a memory control circuit element are provided. The method includes: detecting a notification signal from a volatile memory module; in response to the notification signal, instructing the volatile memory module to execute N command sequences in a buffer; and after the volatile memory module executes the N command sequences, sending at least one read command sequence, according to M physical addresses involved in the N command sequences, to instruct the volatile memory module to read first data from the M physical addresses.

公开(公告)号：US20240020021A1

公开(公告)日：2024-01-18

申请号：US17886416

申请日：2022-08-11

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ming-Hui Tseng ,  Chia-Lung Ma ,  Zhen-Yu Weng

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679

Abstract: A data retry-read method, a memory storage device, and a memory control circuit element are provided. The method includes: detecting a notification signal from a volatile memory module; in response to the notification signal, instructing the volatile memory module to execute N command sequences in a buffer; and after the volatile memory module executes the N command sequences, sending at least one read command sequence, according to M physical addresses involved in the N command sequences, to instruct the volatile memory module to read first data from the M physical addresses.