公开(公告)号：US20210183747A1

公开(公告)日：2021-06-17

申请号：US17190261

申请日：2021-03-02

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Hidekazu NAKAMURA ,  Manabu YANAGIHARA ,  Tomohiko NAKAMURA ,  Yusuke KATAGIRI ,  Katsumi OTANI ,  Takeshi KAWABATA

IPC: H01L23/495 ,  H01L29/20 ,  H01L23/00 ,  H01L25/07 ,  H01L25/18 ,  H01L21/52 ,  H01L23/48

Abstract: A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0≤x≤1, 0≤y≤1, 0≤x+y ≤1; and a die pad including
Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm ≥2.00×10−3×L2+0.173, tm being a thickness in mm and L being a length in mm.

公开(公告)号：US20190221503A1

公开(公告)日：2019-07-18

申请号：US16363828

申请日：2019-03-25

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Hidekazu NAKAMURA ,  Manabu YANAGIHARA ,  Tomohiko NAKAMURA ,  Yusuke KATAGIRI ,  Katsumi OTANI ,  Takeshi KAWABATA

IPC: H01L23/495 ,  H01L29/20 ,  H01L23/00

CPC classification number: H01L23/49513 ,  H01L21/52 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/07 ,  H01L25/18 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/812 ,  H01L2224/0603 ,  H01L2224/29116 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0≤x≤1, 0≤y≤1, 0≤x+y≤1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm≥2.00×10−3×L2+0.173, tm being a thickness in mm and L being a length in mm.