公开(公告)号：US20210165699A1

公开(公告)日：2021-06-03

申请号：US16701797

申请日：2019-12-03

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： ALBERTO PARRAVICINI ,  DAVIDE BARTOLINI ,  LUKAS STADLER ,  ARNAUD DELAMARE

IPC: G06F9/54 ,  G06F9/455 ,  G06F9/30 ,  G06F9/38 ,  G06F8/41 ,  G06F15/80

Abstract: Techniques are provided for an automated method of adding out-of-bound access prevention in GPU kernels executed in a managed environment. In an embodiment, a system of computers compiles a GPU kernel code function that includes one or more array references that are memory address dependent. The system of computers compiles the kernel code function by generating a rewritten GPU kernel code module that includes, within the function signature of the rewritten GPU kernel code module, a respective array size parameter for each array reference of the one or more array references included in the GPU kernel code function. The system of computers further compiles the kernel code function by adding bounding protection instructions to the one or more potential out-of-bound access instructions in the rewritten GPU kernel code module. The potential out-of-bound access instructions comprise instructions that reference each respective array size parameter of the one or more array references. Afterwards, the rewritten GPU kernel code module is loaded in a virtual machine. Loading the rewritten GPU kernel code module in the virtual machine comprises modifying a host application to automatically transmit, from the host application, one or more input array size values. The one or more input array size values is referenced by the one or more potential out-of-bound-access instructions.

公开(公告)号：US20210279282A1

公开(公告)日：2021-09-09

申请号：US17330046

申请日：2021-05-25

Applicant: Oracle International Corporation

Inventor： DAMIEN HILLOULIN ,  DAVIDE BARTOLINI ,  OSKAR VAN REST ,  Alexander Weld ,  Sungpack Hong ,  Hassan Chafi

IPC: G06F16/901 ,  G06F16/28 ,  G06F16/22

Abstract: Techniques are provided herein for efficient representation of heterogeneous graphs in memory. In an embodiment, vertices and edges of the graph are segregated by type. Each property of a type of vertex or edge has values stored in a respective vector. Directed or undirected edges of a same type are stored in compressed sparse row (CSR) format. The CSR format is more or less repeated for edge traversal in either forward or reverse direction. An edge map translates edge offsets obtained from traversal in the reverse direction for use with data structures that expect edge offsets in the forward direction. Subsequent filtration and/or traversal by type or property of vertex or edge entails minimal data access and maximal data locality, thereby increasing efficient use of the graph.

公开(公告)号：US20190325075A1

公开(公告)日：2019-10-24

申请号：US15956115

申请日：2018-04-18

Applicant: Oracle International Corporation

Inventor： DAMIEN HILLOULIN ,  DAVIDE BARTOLINI ,  OSKAR VAN REST ,  Alexander Weld ,  Sungpack Hong ,  Hassan Chafi

IPC: G06F17/30

Abstract: Techniques are provided herein for efficient representation of heterogeneous graphs in memory. In an embodiment, vertices and edges of the graph are segregated by type. Each property of a type of vertex or edge has values stored in a respective vector. Directed or undirected edges of a same type are stored in compressed sparse row (CSR) format. The CSR format is more or less repeated for edge traversal in either forward or reverse direction. An edge map translates edge offsets obtained from traversal in the reverse direction for use with data structures that expect edge offsets in the forward direction. Subsequent filtration and/or traversal by type or property of vertex or edge entails minimal data access and maximal data locality, thereby increasing efficient use of the graph.