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    System and method for enhancing the legibility of degraded images
    2.
    发明授权
    System and method for enhancing the legibility of degraded images 有权
    用于增强退化图像可读性的系统和方法

    公开(公告)号：US08995782B2

    公开(公告)日：2015-03-31

    申请号：US13301436

    申请日：2011-11-21

    申请人： Jon Parker ,  Gideon Frieder ,  Ophir Frieder

    发明人： Jon Parker ,  Gideon Frieder ,  Ophir Frieder

    IPC分类号： G06K9/40 ,  G06K9/34 ,  G06T5/00 ,  H04N1/409

    CPC分类号： G06T5/008 ,  G06K9/342 ,  G06K9/40 ,  G06K2209/01 ,  G06T2207/10008 ,  G06T2207/20192 ,  G06T2207/30176 ,  H04N1/4092

    摘要： Disclosed are embodiments for a system, method, and computer program product for performing an process on an original image, the process being implemented by a computer system performs a comprising the at least one computer: performing an process on an image that renders the processed image legible than then the original image, wherein the analysis segregates dark pixels of the image from light pixels of the image. The method can comprise: first converting the image into a grayscale image. The method comprises processing a pixel area for each pixel of the image is a dark pixel or a light pixel and determining if a pixel is proximate to an edge.

    摘要翻译： 公开了用于执行原始图像上的处理的系统，方法和计算机程序产品的实施例，由计算机系统执行的处理执行包括至少一个计算机：对图像执行处理，该处理使得处理的图像 比原始图像清楚，其中分析将图像的暗像素与图像的光像素分离。 该方法可以包括：首先将图像转换成灰度图像。 该方法包括处理图像的每个像素的像素区域是暗像素或光像素，并且确定像素是否靠近边缘。

    Dynamic query optimization using partial information
    4.
    发明授权
    Dynamic query optimization using partial information 失效
    使用部分信息的动态查询优化

    公开(公告)号：US5335345A

    公开(公告)日：1994-08-02

    申请号：US508265

    申请日：1990-04-11

    申请人： Gideon Frieder ,  Ophir Frieder

    发明人： Gideon Frieder ,  Ophir Frieder

    IPC分类号： G06F17/30 ,  G06F15/40

    CPC分类号： G06F17/30474 ,  Y10S707/99935

    摘要： A method for executing a query comprising a sequence of operations to be performed on one or more relational databases comprises statistically sampling the relational databases at the times the operations are to be executed and then dynamically optimizing the performance of the operations based on the statistical samples obtained as a result of the sampling step.

    摘要翻译： 一种用于执行查询的方法，包括要在一个或多个关系数据库上执行的操作序列，包括在执行操作时对关系数据库进行统计采样，然后基于所获得的统计样本动态优化操作的性能 作为采样步骤的结果。

    Data processing system
    5.
    发明授权
    Data processing system 失效
    数据处理系统

    公开(公告)号：US4516199A

    公开(公告)日：1985-05-07

    申请号：US213380

    申请日：1980-12-05

    申请人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    发明人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    IPC分类号： G06F11/273 ,  G06F13/28 ,  G06F15/16 ,  G06F15/80 ,  G06F9/00

    CPC分类号： G06F13/28 ,  G06F11/2736 ,  G06F15/161 ,  G06F15/8007

    摘要： A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types. An input-output bus ensemble is connected to the supervisory processor and to each auxiliary processor. At least one device and associated device controller can be connected to the input-output bus ensemble. At least one direct memory access controller can be connected between the main store bus and the input-output bus ensemble.

    摘要翻译： 一种数据处理系统，包括主动和智能主存储，其包括主存储器，以存储不同地址和数据结构的方式访问主存储器的主存储控制器以及连接到控制器的主存储总线。 第一类型的至少一个处理器连接到主存储总线，这是用于执行输入输出和其他操作的辅助处理器。 至少一个第二类型的处理器也连接到主存储总线，这是用于获取，解码和执行指令的执行处理器。 辅助处理器和执行处理器中的一个或两个的全部或一部分可以不同。 用于启动配置和监视系统的监控处理器连接到主存储总线。 通信总线连接到第一类型和第二类型的处理器以及监控处理器。 诊断总线将监控处理器连接到第一和第二类型的每个处理器。 输入 - 输出总线系统连接到监控处理器和每个辅助处理器。 至少一个设备和相关设备控制器可以连接到输入 - 输出总线系统。 至少一个直接存储器访问控制器可以连接在主存储总线和输入 - 输出总线组合之间。

    Data processing system
    6.
    发明授权
    Data processing system 失效

    公开(公告)号：US4527237A

    公开(公告)日：1985-07-02

    申请号：US483444

    申请日：1983-04-14

    申请人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    发明人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    IPC分类号： G06F11/273 ,  G06F13/28 ,  G06F15/16 ,  G06F15/80 ,  G06F13/00

    CPC分类号： G06F13/28 ,  G06F11/2736 ,  G06F15/161 ,  G06F15/8007

    摘要： A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types. An input-output bus ensemble is connected to the supervisory processor and to each auxiliary processor. At least one device and associated device controller can be connected to the input-output bus ensemble. At least one direct memory access controller can be connected between the main store bus and the input-output bus ensemble.

    Intelligent main store for data processing systems
    7.
    发明授权
    Intelligent main store for data processing systems 失效
    数据处理系统的智能主要存储

    公开(公告)号：US4354225A

    公开(公告)日：1982-10-12

    申请号：US83648

    申请日：1979-10-11

    申请人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    发明人： Gideon Frieder ,  David T. Hughes ,  Mark H. Kline ,  John T. Liebel, Jr. ,  David P. Meier ,  Edward A. Wolff

    IPC分类号： G06F11/273 ,  G06F13/28 ,  G06F15/80 ,  G06F13/00 ,  G06F15/16

    CPC分类号： G06F13/28 ,  G06F11/2736 ,  G06F15/8007

    摘要： A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types. An input-output bus ensemble is connected to the supervisory processor and to each auxiliary processor. At least one device and associated device controller can be connected to the input-output bus ensemble. At least one direct memory access controller can be connected between the main store bus and the input-output bus ensemble.

    摘要翻译： 一种数据处理系统，包括主动和智能主存储，其包括主存储器，以存储不同地址和数据结构的方式访问主存储器的主存储控制器以及连接到控制器的主存储总线。 第一类型的至少一个处理器连接到主存储总线，这是用于执行输入输出和其他操作的辅助处理器。 至少一个第二类型的处理器也连接到主存储总线，这是用于获取，解码和执行指令的执行处理器。 辅助处理器和执行处理器中的一个或两个的全部或一部分可以不同。 用于启动配置和监视系统的监控处理器连接到主存储总线。 通信总线连接到第一类型和第二类型的处理器以及监控处理器。 诊断总线将监控处理器连接到第一和第二类型的每个处理器。 输入 - 输出总线系统连接到监控处理器和每个辅助处理器。 至少一个设备和相关设备控制器可以连接到输入 - 输出总线系统。 至少一个直接存储器访问控制器可以连接在主存储总线和输入 - 输出总线组合之间。