公开(公告)号：US20190043904A1

公开(公告)日：2019-02-07

申请号：US15666901

申请日：2017-08-02

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Wei-Feng Lin

IPC: H01L27/146 ,  H01L23/48 ,  H01L23/00

Abstract: An image sensor package, comprising a silicon substrate; an image sensor pixel array that is formed on the silicon substrate; a peripheral circuit region that is formed around the image sensor pixel array on the silicon substrate; a redistribution layer (RDL) that is electrically coupled to the peripheral circuit region; at least one solder ball that is electrically coupled to the RDL; and a cover glass that is coupled to the RDL. No part of the RDL is located directly above or below the image sensor pixel array. No part of the at least one solder ball is located directly above or below the silicon substrate. A dark material layer is implemented to prevent an edge flare effect of the image sensor pixel array.

公开(公告)号：US10020335B2

公开(公告)日：2018-07-10

申请号：US15261444

申请日：2016-09-09

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Ying-Chih Kuo

IPC: H01L23/48 ,  H01L21/44 ,  H01L27/146

CPC classification number: H01L27/14632 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14687 ,  H01L2224/11

Abstract: A short-resistant CSP includes an isolation layer, an electrically conductive RDL, and an insulating layer. The electrically conductive RDL is on the isolation layer and includes a first and a second RDL segment. The insulating layer includes a first insulator portion between the isolation layer and the first RDL segment to improve electrical isolation between the first and second RDL segments. A method for preventing short-circuiting between conductors of CSP includes (1) depositing a first insulating layer on a first substrate region, (2) depositing a RDL segment on the substrate above the first substrate region, at least a portion of the first insulating layer being between the first RDL segment and the first substrate region, and (3) depositing a second RDL segment on the substrate above a second substrate region, such that the first insulating layer interrupts a leakage current path between the first and second RDL segments.

公开(公告)号：US20180076248A1

公开(公告)日：2018-03-15

申请号：US15261444

申请日：2016-09-09

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Ying-Chih Kuo

IPC: H01L27/146

CPC classification number: H01L27/14632 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14687

Abstract: A short-resistant CSP includes an isolation layer, an electrically conductive RDL, and an insulating layer. The electrically conductive RDL is on the isolation layer and includes a first and a second RDL segment. The insulating layer includes a first insulator portion between the isolation layer and the first RDL segment to improve electrical isolation between the first and second RDL segments. A method for preventing short-circuiting between conductors of CSP includes (1) depositing a first insulating layer on a first substrate region, (2) depositing a RDL segment on the substrate above the first substrate region, at least a portion of the first insulating layer being between the first RDL segment and the first substrate region, and (3) depositing a second RDL segment on the substrate above a second substrate region, such that the first insulating layer interrupts a leakage current path between the first and second RDL segments.

公开(公告)号：US10312276B2

公开(公告)日：2019-06-04

申请号：US15666901

申请日：2017-08-02

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Wei-Feng Lin

IPC: H01L27/146 ,  H01L23/48 ,  H01L23/00

Abstract: An image sensor package, comprising a silicon substrate; an image sensor pixel array that is formed on the silicon substrate; a peripheral circuit region that is formed around the image sensor pixel array on the silicon substrate; a redistribution layer (RDL) that is electrically coupled to the peripheral circuit region; at least one solder ball that is electrically coupled to the RDL; and a cover glass that is coupled to the RDL. No part of the RDL is located directly above or below the image sensor pixel array. No part of the at least one solder ball is located directly above or below the silicon substrate. A dark material layer is implemented to prevent an edge flare effect of the image sensor pixel array.