公开(公告)号：US20230147085A1

公开(公告)日：2023-05-11

申请号：US17513069

申请日：2021-10-28

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Zheng Yang ,  Qi Niu ,  Andreas Suess

IPC: H04N13/254 ,  H03K5/24 ,  H03G3/30 ,  H04N13/296 ,  H04N13/271 ,  G01S17/894

CPC classification number: H04N13/254 ,  G01S17/894 ,  H03G3/30 ,  H03K5/24 ,  H04N13/271 ,  H04N13/296

Abstract: A time-of-flight sensor includes an integrated circuit chip in which a voltage regulator and a load are disposed. The load includes a grouping of pixel circuits and modulation driver that is supplied power from the voltage regulator. The grouping of pixel circuits included in a pixel array disposed in the integrated circuit trip. Each one of the pixel circuits includes a photodiode configured to photogenerate charge in response to reflected modulated light, a floating diffusion configured to store a portion of charge photogenerated in the photodiode, and transfer transistor to transfer the portion of charge from the photodiode to the floating diffusion in response to a phase modulation signal generated by the modulation driver. A feedback circuit is coupled between the load and the voltage regulator and is coupled to receive a feedback signal from the feedback circuit in response to the load.

公开(公告)号：US10298382B2

公开(公告)日：2019-05-21

申请号：US15673298

申请日：2017-08-09

Applicant: OmniVision Technologies, Inc.

Inventor： Charles Qingle Wu ,  Qi Niu

IPC: H04L7/033 ,  H04L7/08 ,  G11B20/14 ,  H03L7/099 ,  H03L7/085 ,  G06F7/68 ,  G06F1/08 ,  H03C3/09 ,  H03L7/18

Abstract: A frequency divider unit has a digital frequency divider configured to divide by an odd integer, and a dual-edge-triggered one-shot coupled to double frequency of an output of the digital frequency divider. The frequency divider unit is configurable to divide an input frequency by a configurable ratio selectable from at least non-integer ratios of 1.5, 2.5, and 3.5. In embodiments, the frequency divider unit relies on circuit delays to determine an output pulsewidth, and in other embodiments the output pulsewidth is determined from a clock signal. In embodiments, the unit is configurable to divide an input frequency by a configurable ratio selectable from at least non-integer ratios of 1.5, 2.5, 3.5, 4.5, 5.5, 6.5, and 7.5 as well as many integer ratios including 2, 4, 6, and 8. In embodiments, the digital frequency divider is configurable to provide a 50% duty cycle to the one-shot.