公开(公告)号：US20140225645A1

公开(公告)日：2014-08-14

申请号：US14168910

申请日：2014-01-30

Applicant: NXP B.V.

Inventor： Vibhu SHARMA ,  Rinze Ida Mechtildis Pete MEIJER ,  Jose Pineda de Gyvez

IPC: H03K19/00

CPC classification number: H03K19/0016 ,  G06F1/10 ,  H03K19/017581 ,  H03K19/018521

Abstract: A tuneable buffer circuit for use in a clock tree has multiple buffers in parallel, each buffer having a grounding function, and also a bypass switch in parallel with the buffers. The circuit has a normal mode of one buffer connected into circuit, a first low voltage mode of multiple buffers connected into circuit in parallel without grounding function, a second low voltage mode of the buffers connected into circuit in parallel with grounding function and a bypass mode.

Abstract translation: 在时钟树中使用的可调谐缓冲电路具有并联的多个缓冲器，每个缓冲器具有接地功能，以及与缓冲器并联的旁路开关。 该电路具有连接到电路中的一个缓冲器的正常模式，多个缓冲器的第一低电压模式并联连接而不具有接地功能，缓冲器的第二低电压模式并联到接地功能和旁路模式 。

公开(公告)号：US20180060589A1

公开(公告)日：2018-03-01

申请号：US15646299

申请日：2017-07-11

Applicant: NXP B.V.

Inventor： Piotr POLAK ,  Vibhu SHARMA

IPC: G06F21/57 ,  H04L9/32

CPC classification number: G06F21/572 ,  G06F8/65 ,  G06F9/445 ,  G06F21/57 ,  G06F21/575 ,  H04L9/32 ,  H04L9/3242 ,  H04L9/3247 ,  H04L9/3263 ,  H04L63/123 ,  H04W12/0023

Abstract: An apparatus comprising: a firmware authentication element configured to, based on received firmware and predetermined cryptographic authentication information, provide for cryptographic based authentication of the received firmware to control execution of the received firmware by any one of a plurality of processors.