公开(公告)号：US20200313934A1

公开(公告)日：2020-10-01

申请号：US16802862

申请日：2020-02-27

申请人： NXP B.V

发明人： Denis Sergeevich Shuvalov

IPC分类号： H04L25/02 ,  H04L25/49 ,  H04B10/40 ,  H05K1/02

摘要： A galvanic isolation circuit comprising: a galvanic isolator having a first side and a second side; a first communication link connected to the first side of the galvanic isolator and connectable to a first transceiver a second communication link connected to the second side of the galvanic isolator and connectable to a second transceiver; a first reference terminal connectable to the first transceiver; a second reference terminal connectable to the second transceiver; and an AC short capacitor connected between the first reference terminal and the second reference terminal.

公开(公告)号：US10785065B2

公开(公告)日：2020-09-22

申请号：US15918094

申请日：2018-03-12

申请人： NXP B.V.

发明人： Denis Sergeevich Shuvalov

IPC分类号： H04L25/02 ,  G01R31/382 ,  H01M10/42 ,  G06F13/40 ,  H04L29/12 ,  G06F13/42

摘要： Aspects of the present disclosure are directed to facilitating communications to respective circuit nodes in a manner that may also be useful for mitigating undesirable signal attenuation. As may be implemented in accordance with one or more embodiments, switchable isolation circuits, presented by at least one transformer and switch, are utilized to isolate adjacent data processing nodes on a bus in which each data processing node includes logic circuitry and processes signal therein. For each of the switchable isolation circuits, switching circuitry operates to mitigate communication propagation over the differential bus between adjacent data processing nodes, by switching the switchable isolation circuit for providing isolation. This approach may be utilized, for example, to assign sequential identification to daisy-chained circuit nodes upon start-up or reset, for use in addressing each node directly for further communication therewith.

公开(公告)号：US11063789B2

公开(公告)日：2021-07-13

申请号：US16802862

申请日：2020-02-27

申请人： NXP B.V.

发明人： Denis Sergeevich Shuvalov

IPC分类号： H04L25/02 ,  H04B10/40 ,  H04L25/49 ,  H05K1/02

摘要： A galvanic isolation circuit comprising: a galvanic isolator having a first side and a second side; a first communication link connected to the first side of the galvanic isolator and connectable to a first transceiver a second communication link connected to the second side of the galvanic isolator and connectable to a second transceiver; a first reference terminal connectable to the first transceiver; a second reference terminal connectable to the second transceiver; and an AC short capacitor connected between the first reference terminal and the second reference terminal.

公开(公告)号：US20190280903A1

公开(公告)日：2019-09-12

申请号：US15918094

申请日：2018-03-12

申请人： NXP B.V.

发明人： Denis Sergeevich Shuvalov

IPC分类号： H04L25/02 ,  G01R31/36 ,  H01M10/42

摘要： Aspects of the present disclosure are directed to facilitating communications to respective circuit nodes in a manner that may also be useful for mitigating undesirable signal attenuation. As may be implemented in accordance with one or more embodiments, switchable isolation circuits, presented by at least one transformer and switch, are utilized to isolate adjacent data processing nodes on a bus in which each data processing node includes logic circuitry and processes signal therein. For each of the switchable isolation circuits, switching circuitry operates to mitigate communication propagation over the differential bus between adjacent data processing nodes, by switching the switchable isolation circuit for providing isolation. This approach may be utilized, for example, to assign sequential identification to daisy-chained circuit nodes upon start-up or reset, for use in addressing each node directly for further communication therewith.