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公开(公告)号:US12112709B2
公开(公告)日:2024-10-08
申请号:US18080748
申请日:2022-12-14
Applicant: NOVATEK Microelectronics Corp.
Inventor: Yu-Tsung Lu , Chih-Cheng Chuang
IPC: G09G3/30 , G09G3/20 , G09G3/3275 , G09G3/36
CPC classification number: G09G3/3275 , G09G3/2096 , G09G2310/0291 , G09G2310/0297 , G09G2310/08 , G09G2370/14 , G09G2370/22
Abstract: A method used for a control circuit for controlling a display panel includes steps of: determining whether there is an input video data received at a predetermined time; outputting an output video data and a clock signal having a first frequency to the display panel when determining that there is an input video data received at the predetermined time; and stopping outputting the output video data but outputting the clock signal having a second frequency to the display panel when determining that there is no input video data received at the predetermined time. Wherein, the second frequency is higher than the first frequency.
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公开(公告)号:US20240203362A1
公开(公告)日:2024-06-20
申请号:US18080748
申请日:2022-12-14
Applicant: NOVATEK Microelectronics Corp.
Inventor: Yu-Tsung Lu , Chih-Cheng Chuang
IPC: G09G3/3275 , G09G3/20
CPC classification number: G09G3/3275 , G09G3/2096 , G09G2310/0291 , G09G2310/0297 , G09G2310/08 , G09G2370/14 , G09G2370/22
Abstract: A method used for a control circuit for controlling a display panel includes steps of: determining whether there is an input video data received at a predetermined time; outputting an output video data and a clock signal having a first frequency to the display panel when determining that there is an input video data received at the predetermined time; and stopping outputting the output video data but outputting the clock signal having a second frequency to the display panel when determining that there is no input video data received at the predetermined time. Wherein, the second frequency is higher than the first frequency.
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公开(公告)号:US20220270539A1
公开(公告)日:2022-08-25
申请号:US17676854
申请日:2022-02-22
Applicant: Novatek Microelectronics Corp.
Inventor: Yu-Tsung Lu , Chih-Cheng Chuang
IPC: G09G3/20
Abstract: A display driver integrated circuit, an image processor, and an operation method thereof are provided. The display driver integrated circuit includes a receiving circuit, a memory unit, and a foveated rendering circuit. The receiving circuit receives a first image and a second image from an image providing circuit. The memory unit stores the first image and the second image.
The foveated rendering circuit is coupled to the memory unit. The foveated rendering circuit generates an output image to be displayed by performing image processing based on the first image and the second image. The first image is with respect to a foveated area of the output image. The receiving circuit receives at least a part of one of the first image and the second image before the other one of the first image and the second image is completely received.
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