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公开(公告)号:US12176051B2
公开(公告)日:2024-12-24
申请号:US18193645
申请日:2023-03-31
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Yi-Hsuan Chu
Abstract: A test method is for testing a decision feedback equalization (DFE) of a memory device is provided. The memory device includes a memory bank. The test method includes: providing a first test data pattern having a first data transition frequency and a second test data pattern having a second data transition frequency different from the first data transition frequency; writing the first test data pattern into a first memory section of the memory bank with a first DFE; writing the second test data pattern into a second memory section of the memory bank with the first DFE; reading a first reading data pattern stored in the first memory section and a second reading data pattern stored in the second memory section; and generating a test result signal according to the first reading data pattern and the second reading data pattern.
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公开(公告)号:US20240331791A1
公开(公告)日:2024-10-03
申请号:US18193645
申请日:2023-03-31
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Yi-Hsuan Chu
CPC classification number: G11C29/36 , G11C29/12015 , G11C29/46
Abstract: A test method is for testing a decision feedback equalization (DFE) of a memory device is provided. The memory device includes a memory bank. The test method includes: providing a first test data pattern having a first data transition frequency and a second test data pattern having a second data transition frequency different from the first data transition frequency; writing the first test data pattern into a first memory section of the memory bank with a first DFE; writing the second test data pattern into a second memory section of the memory bank with the first DFE; reading a first reading data pattern stored in the first memory section and a second reading data pattern stored in the second memory section; and generating a test result signal according to the first reading data pattern and the second reading data pattern.
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