公开(公告)号：US11784105B2

公开(公告)日：2023-10-10

申请号：US16960756

申请日：2018-12-03

申请人： Mitsubishi Electric Corporation

发明人： Hodaka Rokubuichi ,  Seiki Hiramatsu ,  Shota Morisaki ,  Shinya Yano

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  H01L25/07 ,  H01L25/18 ,  H02M7/5387 ,  H01L23/29 ,  H02P27/08

CPC分类号： H01L23/3135 ,  H01L23/49524 ,  H01L23/49811 ,  H01L24/24 ,  H01L25/072 ,  H01L25/18 ,  H02M7/53871 ,  H01L23/295 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/24247 ,  H02P27/08

摘要： A semiconductor device includes: a circuit member including a planar portion; a terminal portion formed above the front surface of the planar portion of the circuit member and parallel to the planar portion; a semiconductor element which has an upper surface located below an upper surface of the terminal portion and is formed on the front surface of the planar portion of the circuit member; a resin layer arranged on the semiconductor element and having first openings through which the semiconductor element is exposed; a conductive layer arranged on the resin layer, including an upper surface located above the upper surface of the terminal portion, and joined to the semiconductor element through the first openings; and a sealing member including an upper surface parallel to the planar portion and integrally sealing the circuit member, the semiconductor element, the resin layer, the conductive layer, and part of the terminal portion.

公开(公告)号：US11476170B2

公开(公告)日：2022-10-18

申请号：US17046303

申请日：2018-12-06

申请人： Mitsubishi Electric Corporation

发明人： Yusuke Kaji ,  Hisayuki Taki ,  Seiki Hiramatsu

IPC分类号： H01L23/06 ,  H01L23/049 ,  H01L23/31 ,  H01L23/373 ,  H01L23/00 ,  H01L25/07 ,  H02P27/06

摘要： A power semiconductor module includes an insulating substrate, a first conductive circuit pattern, a second conductive circuit pattern, a first semiconductor device, a second semiconductor device, a sealing member, and a first barrier layer. The sealing member seals the first semiconductor device, the second semiconductor device, the first conductive circuit pattern, and the second conductive circuit pattern. At least one of the first barrier layer and the sealing member includes a first stress relaxation portion. This configuration improves the reliability of the power semiconductor module.