公开(公告)号：US20230165166A1

公开(公告)日：2023-05-25

申请号：US17532908

申请日：2021-11-22

申请人： Microsoft Technology Licensing, LLC

发明人： Geoffrey Charles GARDNER ,  Sergei Vyatcheslavovich GRONIN ,  Flavio GRIGGIO ,  Raymond Leonard KALLAHER ,  Noah Seth CLAY ,  Michael James MANFRA

IPC分类号： H01L39/24

CPC分类号： H01L39/2409 ,  H01L39/228

摘要： Methods of forming semiconductor-superconductor hybrid devices with a horizontally-confined channel are described. An example method includes forming a first isolated semiconductor heterostructure and a second isolated semiconductor heterostructure. The method further includes forming a left gate adjacent to a first side of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure. The method further includes forming a right gate adjacent to a second side, opposite to the first side, of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure, where a top surface of each of the left gate and the right gate is offset vertically from a selected surface of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure by a predetermined offset amount. The method further includes forming a superconducting layer over each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure.

公开(公告)号：US20240065113A1

公开(公告)日：2024-02-22

申请号：US18496493

申请日：2023-10-27

申请人： Microsoft Technology Licensing, LLC

发明人： Geoffrey Charles GARDNER ,  Sergei Vyatcheslavovich GRONIN ,  Flavio GRIGGIO ,  Raymond Leonard KALLAHER ,  Noah Seth CLAY ,  Michael James MANFRA

IPC分类号： H10N60/01

CPC分类号： H10N60/0184 ,  H10N60/128

摘要： Methods of forming semiconductor-superconductor hybrid devices with a horizontally-confined channel are described. An example method includes forming a first isolated semiconductor heterostructure and a second isolated semiconductor heterostructure. The method further includes forming a left gate adjacent to a first side of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure. The method further includes forming a right gate adjacent to a second side, opposite to the first side, of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure, where a top surface of each of the left gate and the right gate is offset vertically from a selected surface of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure by a predetermined offset amount. The method further includes forming a superconducting layer over each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure.

公开(公告)号：US20230165167A1

公开(公告)日：2023-05-25

申请号：US17532811

申请日：2021-11-22

申请人： Microsoft Technology Licensing, LLC

发明人： Geoffrey Charles GARDNER ,  Sergei Vyatcheslavovich GRONIN ,  Flavio GRIGGIO ,  Raymond Leonard KALLAHER ,  Noah Seth CLAY ,  Michael James MANFRA

IPC分类号： H01L39/22 ,  H01L39/24

CPC分类号： H01L39/228 ,  H01L39/2461

摘要： Semiconductor-superconductor hybrid devices with a horizontally-confined channel and methods of forming the same are described. An example semiconductor-superconductor hybrid device includes a semiconductor heterostructure formed over a substrate. The semiconductor-superconductor hybrid device may further include a superconducting layer formed over the semiconductor heterostructure. The semiconductor-superconductor hybrid device may further include a first gate, having a first top surface, formed adjacent to a first side of the semiconductor heterostructure. The semiconductor-superconductor hybrid device may further include a second gate, having a second top surface, formed adjacent to a second side, opposite to the first side, of the semiconductor heterostructure, where each of the first top surface of the first gate and the second top surface of the second gate is offset vertically from a selected surface of the semiconductor heterostructure by a predetermined offset amount.