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公开(公告)号：US12130747B2
公开(公告)日：2024-10-29
申请号：US18081468
申请日：2022-12-14
发明人： Sharath Chandra Ambula , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty , Sushil Kumar
IPC分类号： G06F12/1009
CPC分类号： G06F12/1009 , G06F2212/657
摘要： Methods, systems, and devices for dynamic logical page sizes for memory devices are described. A memory device may use an initial set of logical pages each having a same size and one or more logical-to-physical (L2P) tables to map logical addresses of the logical pages to the physical addresses of corresponding physical pages. As commands are received from a host device, the memory device may dynamically split a logical page to introduce smaller logic pages if the host device accesses data in chunk sizes smaller than the size of the logical page that is split. The memory device may maintain one or more additional L2P tables for each smaller logical page size that is introduced, along with one or more pointer tables to map between L2P tables and entries for larger logical page sizes and L2P tables and entries associated with smaller logical page sizes.
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公开(公告)号：US11625323B2
公开(公告)日：2023-04-11
申请号：US17113999
申请日：2020-12-07
发明人： Sharath Chandra Ambula , Sushil Kumar , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty
IPC分类号： G06F12/02 , G06F12/0831
摘要： Methods, systems, and devices for session-based memory operation are described. A memory system may determine that a logical address targeted by a read command is associated with a session table. The memory system may write the session table to a cache based on the logical address being associated with the session table. After writing the session table to the cache, the memory system may use the session table to determine one or more logical-to-physical (L2P) tables and write the one or more L2P tables to the cache. The memory system may use the L2L tables to perform address translation for logical addresses.
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公开(公告)号：US20220188244A1
公开(公告)日：2022-06-16
申请号：US17117907
申请日：2020-12-10
发明人： Sharath Chandra Ambula , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty , Sushil Kumar
IPC分类号： G06F12/1009
摘要： Methods, systems, and devices for dynamic logical page sizes for memory devices are described. A memory device may use an initial set of logical pages each having a same size and one or more logical-to-physical (L2P) tables to map logical addresses of the logical pages to the physical addresses of corresponding physical pages. As commands are received from a host device, the memory device may dynamically split a logical page to introduce smaller logic pages if the host device accesses data in chunk sizes smaller than the size of the logical page that is split. The memory device may maintain one or more additional L2P tables for each smaller logical page size that is introduced, along with one or more pointer tables to map between L2P tables and entries for larger logical page sizes and L2P tables and entries associated with smaller logical page sizes.
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公开(公告)号：US20220179781A1
公开(公告)日：2022-06-09
申请号：US17113999
申请日：2020-12-07
发明人： Sharath Chandra Ambula , Sushil Kumar , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty
IPC分类号： G06F12/02 , G06F12/0831
摘要： Methods, systems, and devices for session-based memory operation are described. A memory system may determine that a logical address targeted by a read command is associated with a session table. The memory system may write the session table to a cache based on the logical address being associated with the session table. After writing the session table to the cache, the memory system may use the session table to determine one or more logical-to-physical (L2P) tables and write the one or more L2P tables to the cache. The memory system may use the L2L tables to perform address translation for logical addresses.
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公开(公告)号：US20230185727A1
公开(公告)日：2023-06-15
申请号：US18081468
申请日：2022-12-14
发明人： Sharath Chandra Ambula , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty , Sushil Kumar
IPC分类号： G06F12/1009
CPC分类号： G06F12/1009 , G06F2212/657
摘要： Methods, systems, and devices for dynamic logical page sizes for memory devices are described. A memory device may use an initial set of logical pages each having a same size and one or more logical-to-physical (L2P) tables to map logical addresses of the logical pages to the physical addresses of corresponding physical pages. As commands are received from a host device, the memory device may dynamically split a logical page to introduce smaller logic pages if the host device accesses data in chunk sizes smaller than the size of the logical page that is split. The memory device may maintain one or more additional L2P tables for each smaller logical page size that is introduced, along with one or more pointer tables to map between L2P tables and entries for larger logical page sizes and L2P tables and entries associated with smaller logical page sizes.
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公开(公告)号：US11537527B2
公开(公告)日：2022-12-27
申请号：US17117907
申请日：2020-12-10
发明人： Sharath Chandra Ambula , David Aaron Palmer , Venkata Kiran Kumar Matturi , Sri Ramya Pinisetty , Sushil Kumar
IPC分类号： G06F12/1009
摘要： Methods, systems, and devices for dynamic logical page sizes for memory devices are described. A memory device may use an initial set of logical pages each having a same size and one or more logical-to-physical (L2P) tables to map logical addresses of the logical pages to the physical addresses of corresponding physical pages. As commands are received from a host device, the memory device may dynamically split a logical page to introduce smaller logic pages if the host device accesses data in chunk sizes smaller than the size of the logical page that is split. The memory device may maintain one or more additional L2P tables for each smaller logical page size that is introduced, along with one or more pointer tables to map between L2P tables and entries for larger logical page sizes and L2P tables and entries associated with smaller logical page sizes.
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