摘要:
A bit patterned recording system includes a servo channel module configured to recover servo fields written with servo information. A field locator module is configured to locate a field printed to data islands of a medium based on a location of one of the servo fields. The servo islands and the data islands have different spacing. A servo clock has a different phase and frequency than a data clock. A phase error calculator module is configured to estimate a phase error of the data clock based on the field and the data clock. The phase error is used to adjust a phase of the data clock.
摘要:
Techniques are provided for performing bit-locked operations on media. A first control signal is received from a first source, and a second control signal is generated at a second source in response to receiving the first control signal. The media is accessed according to the second control signal. One or more synchronization markers are located during the accessing of the media, and bit-level synchronization between the second source and the media is achieved based, at least partially, on the one or more synchronization markers. A control operation is performed on the media with bit-level synchrony between the second source and the media.
摘要:
Systems, methods, apparatus, and techniques are provided for controlling synchronization of a write clock. A frequency offset is estimated based, at least partially, on a location of the servo synchronization marker to produce the frequency offset estimate. A phase correction value and a frequency correction value associated with the write clock are obtained, and a data clock timing control signal is produced based on the frequency offset estimate, the phase correction value, and the frequency correction value. The data clock timing control signal is applied to a phase interpolator to modify a phase of the write clock.
摘要:
A receiver for a hard disk drive system includes an analog front end module configured to receive a read-back signal and to output a digital read-back signal. An equalizer module is configured to generate a data vector based on the digital read-back signal. A detector module is configured to generate a decision vector based on the data vector. A gain module is configured to generate a scalar gain vector and to generate a revised data vector based on the data vector, the decision vector and the scalar gain vector. A back end module is configured to receive the revised data vector.
摘要:
A system includes a preamble determination module configured to determine an expected preamble of a target track. The expected preamble includes an associated timing recovery pattern. A filter module is configured to receive a readback signal read from the target track based on the expected preamble, and selectively filter the readback signal to remove inter track interference from the readback signal based on the expected preamble.
摘要:
Methods and apparatus are provided for performing interpolated timing recovery using a frequency and phase estimate. An analog signal representing a sector is asynchronously sampled and stored in a storage device. A retiming circuit reads the stored samples and, based on first portions of first and second timing portions of the sector, determines phase adjustments. The retiming circuit generates a signal representing the samples at the adjusted phase and determines sample shift adjustments based on the generated signal and second portions of the first and second timing portions. The retiming circuit computes start and end indices of the sector in the buffer based on the sample shift adjustment and phase adjustment. The start and end indices may be used to compute a frequency estimate. The frequency estimate and a phase adjustment is used to interpolate the asynchronous samples at the appropriate frequency and phase.
摘要:
Methods and apparatus are provided for performing interpolated timing recovery using a frequency and phase estimate. An analog signal representing a sector is asynchronously sampled and stored in a storage device. A retiming circuit reads the stored samples and, based on first portions of first and second timing portions of the sector, determines phase adjustments. The retiming circuit generates a signal representing the samples at the adjusted phase and determines sample shift adjustments based on the generated signal and second portions of the first and second timing portions. The retiming circuit computes start and end indices of the sector in the buffer based on the sample shift adjustment and phase adjustment. The start and end indices may be used to compute a frequency estimate. The frequency estimate and a phase adjustment is used to interpolate the asynchronous samples at the appropriate frequency and phase.
摘要:
A receiver for a hard disk drive system includes an analog front end module configured to sample a read-back signal and to output a digital read-back signal. An equalizer module is configured to generate a data vector based on the digital read-back signal. A detector module is configured to generate a decision vector based on the data vector. A re-timing module is configured to generate a first revised data vector based on the data vector and the decision vector. The re-timing module re-samples a plurality of samples in the data vector in a non-sequential time order to generate the first revised data vector. An inter-track interference (ITI) cancellation module is configured to remove ITI from the first revised data vector and to generate a second revised data vector.
摘要:
A system includes an input circuit, an analog to digital converter, first and second harmonic sensor modules, a head height control module, and a weighting function module. The input circuit receives analog signals from a read/write head. The analog to digital converter generates digital samples in response to the analog signals. The first and second harmonic sensor modules determine, from the digital samples, a first magnitude of a first frequency component and a second magnitude of a second frequency component, respectively. The head height control module estimates a height of the head over a storage medium in response to a comparison of the first magnitude and the second magnitude, and selectively adjusts the height in response to the estimated height. The weighting function module applies a time domain window function to the digital samples to create modified samples on which the first and second harmonic sensor modules operate.
摘要:
Methods, apparatuses, and systems implementing analog techniques to decode signals extracted from servo wedges of computer-readable storage media. A digital representation of at least a portion of a repeatable runout (RRO) signal derived from an analog signal read from a computer-readable storage medium is obtained. An estimate of a magnitude of the RRO signal is determined based on the digital representation. An error signal is generated to represent a difference between the estimate of the magnitude and a specified level of the magnitude of the RRO signal, and a gain value is configured, based on the error signal, for decoding a signal from the computer-readable storage medium.