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1.
公开(公告)号:US10929582B2
公开(公告)日:2021-02-23
申请号:US16089408
申请日:2017-03-31
Applicant: Mentor Graphics Corporation
Inventor: Michael Alam
IPC: G06F30/33 , G06F30/367 , G06F30/347 , G06F30/333 , G06F11/26
Abstract: Circuits may be designed using computer aided design tools and may comprise a plurality of different possible variants of individual components. These multi-variant component circuits may be validated to identify potential problems by generating an aggregate parametric model for the multi-variant components and then using the aggregate parametric model in applying tests to different connection networks of the circuit definition.
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公开(公告)号:US20200327028A1
公开(公告)日:2020-10-15
申请号:US16088990
申请日:2017-03-31
Applicant: Mentor Graphics Corporation
Inventor: Michael Alam
Abstract: A report of results of validating a circuit can simplify a large number of error events, that can be generated when designing electrical circuits using computer aided design tools, by first filtering the large number of error events according to a user defined filter criteria. The filter results are processed by one or more report rules. Each of the report rules may generate one or more report results based on, at least, the filtered error events.
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公开(公告)号:US10380298B2
公开(公告)日:2019-08-13
申请号:US14160859
申请日:2014-01-22
Applicant: Mentor Graphics Corporation
Inventor: Michael Alam , Peter Campbell , Mark Cianfaglione
IPC: G06F17/50
Abstract: Systems and methods for validating a circuit design are described. The circuit validation includes determining a subset of checks to apply to a portion of the overall circuit based on the pin type composition of the circuit portion.
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4.
公开(公告)号:US20200302102A1
公开(公告)日:2020-09-24
申请号:US16089408
申请日:2017-03-31
Applicant: Mentor Graphics Corporation
Inventor: Michael Alam
IPC: G06F30/33 , G06F30/367 , G06F30/347 , G06F30/333 , G06F11/26
Abstract: Circuits may be designed using computer aided design tools and may comprise a plurality of different possible variants of individual components. These multi-variant component circuits may be validated to identify potential problems by generating an aggregate parametric model for the multi-variant components and then using the aggregate parametric model in applying tests to different connection networks of the circuit definition.
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